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74LVC1G386GW-Q100 PDF预览

74LVC1G386GW-Q100

更新时间: 2024-04-09 18:58:59
品牌 Logo 应用领域
安世 - NEXPERIA /
页数 文件大小 规格书
11页 219K
描述
3-input EXCLUSIVE-OR gateProduction

74LVC1G386GW-Q100 数据手册

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74LVC1G386-Q100  
3-input EXCLUSIVE-OR gate  
Rev. 1 — 2 November 2023  
Product data sheet  
1. General description  
The 74LVC1G386-Q100 is a single 3-input EXCLUSIVE-OR gate. Inputs can be driven from either  
3.3 V or 5 V devices. This feature allows the use of these devices as translators in mixed 3.3 V and  
5 V environments.  
Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times.  
This device is fully specified for partial power down applications using IOFF. The IOFF circuitry  
disables the output, preventing the potentially damaging backflow current through the device when  
it is powered down.  
This product has been qualified to the Automotive Electronics Council (AEC) standard Q100  
(Grade 1) and is suitable for use in automotive applications.  
2. Features and benefits  
Automotive product qualification in accordance with AEC-Q100 (Grade 1)  
Specified from -40 °C to +85 °C and -40 °C to +125 °C  
Wide supply voltage range from 1.65 V to 5.5 V  
Overvoltage tolerant inputs to 5.5 V  
High noise immunity  
CMOS low power dissipation  
Direct interface with TTL levels  
±24 mA output drive (VCC = 3.0 V)  
IOFF circuitry provides partial Power-down mode operation  
Latch-up performance exceeds 250 mA  
Complies with JEDEC standard:  
JESD8-7 (1.65 V to 1.95 V)  
JESD8-5 (2.3 V to 2.7 V)  
JESD8C (2.7 V to 3.6 V)  
JESD36 (4.5 V to 5.5 V)  
ESD protection:  
HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V  
CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V  
3. Ordering information  
Table 1. Ordering information  
Type number  
Package  
Temperature range Name  
Description  
Version  
74LVC1G386GW-Q100 -40 °C to +125 °C  
TSSOP6  
plastic thin shrink small outline package;  
6 leads; body width 1.25 mm  
SOT363-2  
 
 
 

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