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SY100E136JC

更新时间： 2024-11-25 22:13:35
品牌 Logo 应用领域
麦瑞 - MICREL 计数器触发器逻辑集成电路输出元件输入元件
页数 文件大小 规格书
8页 122K
描述
6-BIT UNIVERSAL UP/DOWN COUNTER

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中文翻译

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SY100E136JC 技术参数

是否Rohs认证： 不符合生命周期：Obsolete
包装说明：PLASTIC, LCC-28Reach Compliance Code：not_compliant
HTS代码：8542.39.00.01风险等级：5.54
Is Samacsys：N其他特性：TCO OUTPUT; LOOK-AHEAD-CARRY INPUT AND OUTPUT
计数方向：BIDIRECTIONAL系列：100E
JESD-30 代码：S-PQCC-J28JESD-609代码：e0
负载/预设输入：YES逻辑集成电路类型：BINARY COUNTER
最大频率@ Nom-Sup：550000000 Hz工作模式：SYNCHRONOUS
位数：6功能数量：1
端子数量：28最高工作温度：85 °C
最低工作温度：-40 °C输出特性：OPEN-EMITTER
封装主体材料：PLASTIC/EPOXY封装代码：QCCJ
封装等效代码：LDCC28,.5SQ封装形状：SQUARE
封装形式：CHIP CARRIER电源：-4.5 V
最大电源电流（ICC）：170 mA传播延迟（tpd）：1.45 ns
认证状态：Not Qualified子类别：Counters
表面贴装：YES技术：ECL
温度等级：INDUSTRIAL端子面层：Tin/Lead (Sn/Pb)
端子形式：J BEND端子节距：1.27 mm
端子位置：QUAD触发器类型：POSITIVE EDGE
最小 fmax：650 MHzBase Number Matches：1

SY100E136JC 数据手册

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6-BIT UNIVERSAL  
SY10E136  
UP/DOWN COUNTER  
SY100E136  
DESCRIPTION  
FEATURES  
■ 550MHz count frequency  
The SY10/100E136 are 6-bit synchronous, presettable,  
cascadable universal counters. These devices generate  
a look-ahead-carry output and accept a look-ahead-carry  
input. These two features allow for the cascading of  
multiple E136s for wider bit width counters that operate  
at very nearly the same frequency as the stand-alone  
counter.  
The CLOUT output will pulse LOW for one clock cycle  
one count before the E136 reaches terminal count. The  
COUT output will pulse LOW for one clock cycle when  
the counter reaches terminal count. For more information  
on utilizing the look-ahead-carry features of the device,  
please refer to the applications section of this data sheet.  
The differential COUT output facilitates the E136's use in  
programmable divider and self-stopping counter  
applications.  
■ Extended 100E VEE range of –4.2V to –5.5V  
■ Look-ahead-carry input and output  
■ Fully synchronous up and down counting  
■ Asynchronous Master Reset  
■ Internal 75KΩ input pull-down resistors  
■ Available in 28-pin PLCC package  
PIN CONFIGURATION  
Unlike the H136 and other similar universal counter  
designs, the E136 carry-out and look-ahead-carry-out  
signals are registered on chip. This design alleviates the  
glitch problem seen on many counters where the carry-  
out signals are merely gated. Because of this architecture,  
there are some minor functional differences between the  
E136 and H136 counters. The user, regardless of  
familiarity with the H136, should read this data sheet  
carefully. Note specifically (see block diagram) the  
operation of the carry-out outputs and the look-ahead-  
carry-in input when utilizing the Master Reset.  
25 24 23 22 21 20 19  
26  
27  
28  
1
18  
17  
16  
15  
14  
13  
12  
Q3  
D2  
S2  
S1  
Q2  
VCC  
PLCC  
TOP VIEW  
J28-1  
VEE  
VCCO  
COUT  
COUT  
CLK  
2
CIN  
3
CLIN  
4
CLOUT  
5
6
7
8
9
10 11  
When left open, all of the input pins will be pulled  
LOW via an input pulldown resistor. The Master Reset is  
an asynchronous signal which, when asserted, will force  
the Q outputs LOW.  
The Q outputs need not be terminated for the E136 to  
function properly. In fact, if these outputs will not be  
used in a system, it is recommended that they be left  
open to save power and minimize noise. This practice  
will minimize switching noise which can reduce the  
maximum count frequency of the device, or significantly  
reduce margins against other noise in the system.  
PIN NAMES  
Pin  
D0–D5  
Q0–Q5  
S1, S2  
MR  
Function  
Preset Data Inputs  
Differential Data Outputs  
Mode Control Pins  
Master Reset  
CLK  
Clock Input  
COUT, COUT  
CLOUT  
CIN  
Carry Out Output (Active LOW)  
Look-Ahead-Carry Output  
Carry-In Input (Active LOW)  
Look-Ahead-Carry Input  
VCC to Output  
CLIN  
VCCO  
Rev.: C  
Amendment:/1  
Issue Date: February, 1998  
1
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