Datasheet > STU426S

STU426S

更新时间： 2024-11-02 06:14:55

品牌	Logo	应用领域
三合微科 - SAMHOP		晶体晶体管
页数	文件大小	规格书
9页	175K
描述
N-Channel Logic Level E nhancement Mode F ield E ffect Transistor

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数据手册

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STU426S 数据手册

S TU/D426S

S amHop Microelectronics Corp.

ver1.1

Oct,2007

N-Channel Logic Level E nhancement Mode Field E ffect Transistor

PR ODUCT S UMMAR Y

FE ATUR E S

S uper high dense cell design for low R DS (ON).

R ugged and reliable.

Typ

)

VDS S

R DS (ON) ( m

VGS = 10V

40V

53A

TO-252 and TO-251 Package.

10 @ VGS = 4.5V

S TU S E R IE S

TO-252AA(D-PAK)

S TD S E R IE S

TO-251(l-PAK)

ABS OLUTE MAXIMUM R ATINGS (Ta=25 C unless otherwise noted)

S ymbol

Limit

Parameter

Drain-S ource Voltage

Unit

Gate-S ource Voltage

25 C

Drain Current-Continuous

@ Ta=

100

-Pulsed^a

IDM

Drain-S ource Diode Forward Current

Avalanche Current ^c

Avalanche Energy ^c

100

Maximum Power Dissipation

Ta= 25 C

Operating Junction and S torage

Temperature R ange

-55 to 175

TJ, TS TG

THE R MAL CHAR ACTE R IS TICS

Thermal R esistance, Junction-to-Case

Thermal R esistance, Junction-to-Ambient

C/W

12 3 4 5 6 7...9

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