Datasheet > STU5025NLS

STU5025NLS

更新时间： 2024-11-23 04:01:43

品牌	Logo	应用领域
三合微科 - SAMHOP		晶体晶体管场效应晶体管
页数	文件大小	规格书
9页	787K
描述
N-Channel Logic Level E nhancement Mode Field Effect Transistor

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中文翻译

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数据手册

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STU5025NLS 数据手册

S TU/D5025NLS

S amHop Microelectronics C orp.

Dec 30,2005

N-C hannel Logic Level E nhancement Mode Field E ffect Transistor

PR ODUCT S UMMAR Y

FE ATUR E S

S uper high dense cell design for low R DS (ON).

R ugged and reliable.

VDS S

R DS (ON) ( m

Ω

)

Max

8 @ VG S = 10V

12 @ VG S = 4.5V

25V

50A

TO-252 and TO-251 P ackage.

S TU S E R IE S

TO-252AA(D-P AK)

S TD S E R IE S

TO-251(l-P AK)

ABS OLUTE MAXIMUM R ATING S (Ta=25 C unless otherwise noted)

Limit

Unit

P arameter

Drain-S ource Voltage R ating

Drain-S ource Voltage

S ymbol

Vspike^c

G S

G ate-S ource Voltage

Drain C urrent-C ontinuous @ T

=25 C

-P ulsed

200

Drain-S ource Diode Forward C urrent

@ Tc=25 C

Maximum P ower Dissipation

Operating and S torage

Temperature R ange

-55 to 175

TJ , TS TG

THE R MAL C HAR AC TE R IS TIC S

Thermal R esistance, J unction-to-C ase

C/W

J C

J A

Thermal R esistance, J unction-to-Ambient

12 3 4 5 6 7...9

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