Datasheet > SN74LVC2G79_08

SN74LVC2G79_08

更新时间： 2024-11-04 05:29:31

品牌	Logo	应用领域
德州仪器 - TI		触发器
页数	文件大小	规格书
14页	460K
描述
DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP

阅读下载

中文翻译

获取价格

数据手册

如果您发现信息不准确，欢迎纠错

SN74LVC2G79_08 数据手册

SN74LVC2G79

DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP

www.ti.com

SCES498D–OCTOBER 2003–REVISED FEBRUARY 2007

FEATURES

•

Available in the Texas Instruments

NanoFree™ Package

•

Typical V_OHV(Output V_OHUndershoot)

>2 V at V_CC= 3.3 V, T_A= 25°C

•

Supports 5-V V_CCOperation

I_offFeature Supports Partial-Power-Down

Mode Operation

Inputs Accept Voltages to 5.5 V

Max t_pdof 4.2 ns at 3.3 V

Latch-Up Performance Exceeds 100 mA Per

JESD 78, Class II

Low Power Consumption, 10-µA Max I_CC

±24-mA Output Drive at 3.3 V

ESD Protection Exceeds JESD 22

–

2000-V Human-Body Model (A114-A)

200-V Machine Model (A115-A)

Typical V_OLP(Output Ground Bounce)

<0.8 V at V_CC= 3.3 V, T_A= 25°C

1000-V Charged-Device Model (C101)

DCT PACKAGE

(TOP VIEW)

DCU PACKAGE

(TOP VIEW)

YZP PACKAGE

(BOTTOM VIEW)

4 5

GND

2CLK

V_CC

1CLK

V_CC

1CLK

3 6

2 7

1 8

V_CC

1CLK

GND

2CLK

GND

2CLK

See mechanical drawings for dimensions.

DESCRIPTION/ORDERING INFORMATION

This dual positive-edge-triggered D-type flip-flop is designed for 1.65-V to 5.5-V V_CCoperation.

When data at the data (D) input meets the setup time requirement, the data is transferred to the Q output on the

positive-going edge of the clock pulse. Clock triggering occurs at a voltage level and is not directly related to the

rise time of the clock pulse. Following the hold-time interval, data at the D input can be changed without

affecting the levels at the outputs.

NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the die as the

package.

This device is fully specified for partial-power-down applications using I_off. The I_offcircuitry disables the outputs,

preventing damaging current backflow through the device when it is powered down.

ORDERING INFORMATION

T_A

PACKAGE⁽¹⁾

ORDERABLE PART NUMBER

TOP-SIDE MARKING⁽²⁾

NanoFree™ – WCSP (DSBGA)

0.23-mm Large Bump – YZP

(Pb-free)

Reel of 3000

SN74LVC2G79YZPR

_ _ _CR_

–40°C to 85°C

SSOP – DCT

Reel of 3000

SN74LVC2G79DCTR

SN74LVC2G79DCUR

C79_ _ _

C79_

VSSOP – DCU

(1) Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at

www.ti.com/sc/package.

(2) DCT: The actual top-side marking has three additional characters that designate the year, month, and assembly/test site.

DCU: The actual top-side marking has one additional character that designates the assembly/test site.

YZP: The actual top-side marking has three preceding characters to denote year, month, and sequence code, and one following

character to designate the assembly/test site. Pin 1 identifier indicates solder-bump composition (1 = SnPb, • = Pb-free).

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas

Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

NanoFree is a trademark of Texas Instruments.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

12 3 4 5 6 7...14

中文翻译

下载PDF

与SN74LVC2G79_08相关器件

型号	品牌	获取价格	描述	数据表
SN74LVC2G79DCTR	TI	获取价格	DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP
SN74LVC2G79DCTRE4	TI	获取价格	DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP
SN74LVC2G79DCUR	TI	获取价格	DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP
SN74LVC2G79DCURE4	TI	获取价格	DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP
SN74LVC2G79DCURG4	TI	获取价格	DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP
SN74LVC2G79YEPR	TI	获取价格	DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP
SN74LVC2G79YZPR	TI	获取价格	DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP
SN74LVC2G80	TI	获取价格	DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP
SN74LVC2G80_08	TI	获取价格	DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP
SN74LVC2G80_15	TI	获取价格	Dual Positive-Edge-Triggered D-Type Flip-Flop

与SN74LVC2G79_08相关文章

英伟达新AI芯片Rubin或提前半年亮相
2024-11-05

13
苹果iPhone 17将全系采用三星/LG显示LTPO OLED面板
2024-11-05

7
三星深化印度制造布局，供应链本地化进程加速
2024-10-29

35
芯擎科技“星辰一号”自动驾驶芯片点亮成功，2025年量产在即
2024-10-29

31

产品中心

服务支持

精选活动

关于我们

帮助中心

SN74LVC2G79_08

SN74LVC2G79_08 数据手册

与SN74LVC2G79_08相关器件

与SN74LVC2G79_08相关文章

您还可以找

产品中心

服务支持

精选活动

关于我们

帮助中心

SN74LVC2G79_08

SN74LVC2G79_08 数据手册

与SN74LVC2G79_08相关器件

与SN74LVC2G79_08相关文章

您还可以找

您在本页遇到什么问题？