Datasheet > 逻辑 > 栅极> SN74LVC2G86

SN74LVC2G86

更新时间： 2024-01-25 08:11:27

品牌	Logo	应用领域
德州仪器 - TI		输入元件
页数	文件大小	规格书
14页	349K
描述
DUAL 2-INPUT EXCLUSIVE OR GATE

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SN74LVC2G86 数据手册

SN74LVC2G86

DUAL 2-INPUT EXCLUSIVE-OR GATE

www.ti.com

SCES360F–AUGUST 2001–REVISED MAY 2005

FEATURES

DCT OR DCU PACKAGE

(TOP VIEW)

•

Available in the Texas Instruments

NanoStar™ and NanoFree™ Packages

•

Supports 5-V V_CCOperation

Inputs Accept Voltages to 5.5 V

Max t_pdof 4.7 ns at 3.3 V

GND

Low Power Consumption, 10-µA Max I_CC

±24-mA Output Drive at 3.3 V

YEA, YEP, YZA, OR YZP PACKAGE

(BOTTOM VIEW)

Typical V_OLP(Output Ground Bounce) <0.8 V

at V_CC= 3.3 V, T_A= 25°C

•

Typical V_OHV(Output V_OHUndershoot) >2 V at

V_CC= 3.3 V, T_A= 25°C

GND

I_offSupports Partial-Power-Down Mode

Operation

Latch-Up Performance Exceeds 100 mA Per

JESD 78, Class II

ESD Protection Exceeds JESD 22

– 2000-V Human-Body Model (A114-A)

– 200-V Machine Model (A115-A)

– 1000-V Charged-Device Model (C101)

DESCRIPTION/ORDERING INFORMATION

This dual 2-input exclusive-OR gate is designed for 1.65-V to 5.5-V V_CCoperation.

The SN74LVC2G86 performs the Boolean function Y = A B or Y = AB + AB in positive logic.

ORDERING INFORMATION

T_A

PACKAGE⁽¹⁾

ORDERABLE PART NUMBER

TOP-SIDE MARKING⁽²⁾

NanoStar™ – WCSP (DSBGA)

0.17-mm Small Bump – YEA

SN74LVC2G86YEAR

NanoFree™ – WCSP (DSBGA)

0.17-mm Small Bump – YZA (Pb-free)

SN74LVC2G86YZAR

SN74LVC2G86YEPR

SN74LVC2G86YZPR

Reel of 3000

_ _ _CH_

NanoStar™ – WCSP (DSBGA)

0.23-mm Large Bump – YEP

–40°C to 85°C

NanoFree™ – WCSP (DSBGA)

0.23-mm Large Bump – YZP (Pb-free)

SSOP – DCT

Reel of 3000 SN74LVC2G86DCTR

Reel of 3000 SN74LVC2G86DCUR

C86_ _ _

C86_

VSSOP – DCU

Reel of 250

SN74LVC2G86DCUT

(1) Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at

www.ti.com/sc/package.

(2) DCT: The actual top-side marking has three additional characters that designate the year, month, and assembly/test site.

DCU: The actual top-side marking has one additional character that designates the assembly/test site.

YEA/YZA, YEP/YZP: The actual top-side marking has three preceding characters to denote year, month, and sequence code, and one

following character to designate the assembly/test site. Pin 1 identifier indicates solder-bump composition (1 = SnPb, • = Pb-free).

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas

Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

NanoStar, NanoFree are trademarks of Texas Instruments.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

12 3 4 5 6 7...14

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与SN74LVC2G86相关器件

型号	品牌	获取价格	描述	数据表
SN74LVC2G86DCTR	TI	获取价格	DUAL 2-INPUT EXCLUSIVE OR GATE
SN74LVC2G86DCTRE4	TI	获取价格	Dual 2-Input Exclusive-Or Gate 8-SM8 -40 to 85
SN74LVC2G86DCTRG4	TI	获取价格	Dual 2-Input Exclusive-Or Gate 8-SM8 -40 to 125
SN74LVC2G86DCUR	TI	获取价格	DUAL 2-INPUT EXCLUSIVE OR GATE
SN74LVC2G86DCURE4	TI	获取价格	DUAL 2-INPUT EXCLUSIVE OR GATE
SN74LVC2G86DCURG4	TI	获取价格	Dual 2-Input Exclusive-OR Gate
SN74LVC2G86DCUT	TI	获取价格	DUAL 2-INPUT EXCLUSIVE OR GATE
SN74LVC2G86DCUTE4	TI	获取价格	DUAL 2-INPUT EXCLUSIVE OR GATE
SN74LVC2G86DCUTG4	TI	获取价格	LVC/LCX/Z SERIES, DUAL 2-INPUT XOR GATE, PDSO8, GREEN, PLASTIC, VSSOP-8
SN74LVC2G86YEAR	TI	获取价格	DUAL 2-INPUT EXCLUSIVE OR GATE

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