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SN74LVC2G80DCTRE4 PDF预览

SN74LVC2G80DCTRE4

更新时间： 2024-11-04 15:52:19
品牌 Logo 应用领域
德州仪器 - TI 光电二极管输出元件逻辑集成电路触发器
页数 文件大小 规格书
16页 559K
描述
LVC/LCX/Z SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, INVERTED OUTPUT, PDSO8, GREEN, PLASTIC, SSOP-8

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SN74LVC2G80DCTRE4 技术参数

是否无铅：不含铅是否Rohs认证：符合
生命周期：Obsolete零件包装代码：SOIC
包装说明：GREEN, PLASTIC, SSOP-8针数：8
Reach Compliance Code：unknownHTS代码：8542.39.00.01
风险等级：5.54Is Samacsys：N
系列：LVC/LCX/ZJESD-30 代码：R-PDSO-G8
JESD-609代码：e4长度：2.95 mm
负载电容（CL）：50 pF逻辑集成电路类型：D FLIP-FLOP
最大频率@ Nom-Sup：160000000 Hz最大I（ol）：0.024 A
湿度敏感等级：1位数：1
功能数量：2端子数量：8
最高工作温度：85 °C最低工作温度：-40 °C
输出极性：INVERTED封装主体材料：PLASTIC/EPOXY
封装代码：LSSOP封装等效代码：SSOP8,.16
封装形状：RECTANGULAR封装形式：SMALL OUTLINE, LOW PROFILE, SHRINK PITCH
包装方法：TAPE AND REEL峰值回流温度（摄氏度）：260
电源：3.3 VProp。Delay @ Nom-Sup：5.2 ns
传播延迟（tpd）：13.9 ns认证状态：Not Qualified
座面最大高度：1.3 mm子类别：FF/Latches
最大供电电压 (Vsup)：5.5 V最小供电电压 (Vsup)：1.65 V
标称供电电压 (Vsup)：1.8 V表面贴装：YES
技术：CMOS温度等级：INDUSTRIAL
端子面层：Nickel/Palladium/Gold (Ni/Pd/Au)端子形式：GULL WING
端子节距：0.65 mm端子位置：DUAL
处于峰值回流温度下的最长时间：NOT SPECIFIED触发器类型：POSITIVE EDGE
宽度：2.8 mm最小 fmax：160 MHz
Base Number Matches：1

SN74LVC2G80DCTRE4 数据手册

 浏览型号SN74LVC2G80DCTRE4的Datasheet PDF文件第2页浏览型号SN74LVC2G80DCTRE4的Datasheet PDF文件第3页浏览型号SN74LVC2G80DCTRE4的Datasheet PDF文件第4页浏览型号SN74LVC2G80DCTRE4的Datasheet PDF文件第5页浏览型号SN74LVC2G80DCTRE4的Datasheet PDF文件第6页浏览型号SN74LVC2G80DCTRE4的Datasheet PDF文件第7页 
SN74LVC2G80  
DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP  
www.ti.com  
SCES309E–DECEMBER 2001–REVISED FEBRUARY 2007  
FEATURES  
•
Available in the Texas Instruments  
NanoFree™ Package  
>2 V at VCC = 3.3 V, TA = 25°C  
•
•
•
Ioff Feature Supports Partial-Power-Down  
Mode Operation  
•
•
•
•
•
Supports 5-V VCC Operation  
Inputs Accept Voltages to 5.5 V  
Max tpd of 4.2 ns at 3.3 V  
Latch-Up Performance Exceeds 100 mA  
Per JESD 78, Class II  
ESD Protection Exceeds JESD 22  
Low Power Consumption, 10-µA Max ICC  
–
–
–
2000-V Human-Body Model (A114-A)  
200-V Machine Model (A115-A)  
Typical VOLP (Output Ground Bounce)  
<0.8 V at VCC = 3.3 V, TA = 25°C  
•
Typical VOHV (Output VOH Undershoot)  
1000-V Charged-Device Model (C101)  
DCT PACKAGE  
(TOP VIEW)  
DCU PACKAGE  
(TOP VIEW)  
YZP PACKAGE  
(BOTTOM VIEW)  
4 5  
GND  
2Q  
2CLK  
VCC  
1Q  
1
2
3
4
8
7
6
5
1CLK  
1D  
VCC  
1Q  
1
2
3
4
8
7
6
5
1CLK  
1D  
3 6  
2 7  
1 8  
2D  
1Q  
VCC  
1D  
2Q  
2D  
1CLK  
GND  
2CLK  
2Q  
2D  
GND  
2CLK  
See mechanical drawings for dimensions.  
DESCRIPTION/ORDERING INFORMATION  
This dual positive-edge-triggered D-type flip-flop is designed for 1.65-V to 5.5-V VCC operation.  
When data at the data (D) input meets the setup time requirement, the data is transferred to the Q output on the  
positive-going edge of the clock pulse. Clock triggering occurs at a voltage level and is not directly related to the  
rise time of the clock pulse. Following the hold-time interval, data at the D input can be changed without  
affecting the levels at the outputs.  
NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the die as the  
package.  
This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs,  
preventing damaging current backflow through the device when it is powered down.  
ORDERING INFORMATION  
TA  
PACKAGE(1)  
ORDERABLE PART NUMBER  
TOP-SIDE MARKING(2)  
NanoFree™ – WCSP (DSBGA)  
0.23-mm Large Bump – YZP (Pb-free)  
Reel of 3000  
SN74LVC2G80YZPR  
_ _ _CX_  
–40°C to 85°C  
SSOP – DCT  
Reel of 3000  
Reel of 3000  
SN74LVC2G80DCTR  
SN74LVC2G80DCUR  
C80_ _ _  
C80_  
VSSOP – DCU  
(1) Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at  
www.ti.com/sc/package.  
(2) DCT: The actual top-side marking has three additional characters that designate the year, month, and assembly/test site.  
DCU: The actual top-side marking has one additional character that designates the assembly/test site.  
YZP: The actual top-side marking has three preceding characters to denote year, month, and sequence code, and one following  
character to designate the assembly/test site. Pin 1 identifier indicates solder-bump composition (1 = SnPb, • = Pb-free).  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas  
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
NanoFree is a trademark of Texas Instruments.  
PRODUCTION DATA information is current as of publication date.  
Copyright © 2001–2007, Texas Instruments Incorporated  
Products conform to specifications per the terms of the Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  
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