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SN74LVC2G86DCTRG4 PDF预览

SN74LVC2G86DCTRG4

更新时间： 2024-11-04 21:21:43
品牌 Logo 应用领域
德州仪器 - TI 栅光电二极管逻辑集成电路石英晶振触发器
页数 文件大小 规格书
14页 523K
描述
Dual 2-Input Exclusive-Or Gate 8-SM8 -40 to 125

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SN74LVC2G86DCTRG4 技术参数

是否Rohs认证： 符合生命周期：Obsolete
零件包装代码：SOIC包装说明：LSSOP, SSOP8,.16
针数：8Reach Compliance Code：compliant
HTS代码：8542.39.00.01风险等级：5.68
系列：LVC/LCX/ZJESD-30 代码：R-PDSO-G8
JESD-609代码：e4长度：2.95 mm
负载电容（CL）：50 pF逻辑集成电路类型：XOR GATE
最大I（ol）：0.024 A湿度敏感等级：1
功能数量：2输入次数：2
端子数量：8最高工作温度：125 °C
最低工作温度：-40 °C封装主体材料：PLASTIC/EPOXY
封装代码：LSSOP封装等效代码：SSOP8,.16
封装形状：RECTANGULAR封装形式：SMALL OUTLINE, LOW PROFILE, SHRINK PITCH
包装方法：TAPE AND REEL峰值回流温度（摄氏度）：260
电源：3.3 VProp。Delay @ Nom-Sup：4.7 ns
传播延迟（tpd）：9.9 ns认证状态：Not Qualified
施密特触发器：NO座面最大高度：1.3 mm
子类别：Gates最大供电电压 (Vsup)：5.5 V
最小供电电压 (Vsup)：1.65 V标称供电电压 (Vsup)：1.8 V
表面贴装：YES技术：CMOS
温度等级：AUTOMOTIVE端子面层：Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式：GULL WING端子节距：0.65 mm
端子位置：DUAL处于峰值回流温度下的最长时间：NOT SPECIFIED
宽度：2.8 mmBase Number Matches：1

SN74LVC2G86DCTRG4 数据手册

 浏览型号SN74LVC2G86DCTRG4的Datasheet PDF文件第2页浏览型号SN74LVC2G86DCTRG4的Datasheet PDF文件第3页浏览型号SN74LVC2G86DCTRG4的Datasheet PDF文件第4页浏览型号SN74LVC2G86DCTRG4的Datasheet PDF文件第5页浏览型号SN74LVC2G86DCTRG4的Datasheet PDF文件第6页浏览型号SN74LVC2G86DCTRG4的Datasheet PDF文件第7页 
SN74LVC2G86  
DUAL 2-INPUT EXCLUSIVE-OR GATE  
www.ti.com  
SCES360H–AUGUST 2001–REVISED FEBRUARY 2007  
FEATURES  
•
Available in the Texas Instruments  
NanoFree™ Package  
•
•
•
•
Typical VOHV (Output VOH Undershoot)  
>2 V at VCC = 3.3 V, TA = 25°C  
•
•
•
•
•
•
Supports 5-V VCC Operation  
Ioff Supports Partial-Power-Down Mode  
Operation  
Inputs Accept Voltages to 5.5 V  
Max tpd of 4.7 ns at 3.3 V  
Latch-Up Performance Exceeds 100 mA Per  
JESD 78, Class II  
Low Power Consumption, 10-µA Max ICC  
±24-mA Output Drive at 3.3 V  
ESD Protection Exceeds JESD 22  
–
–
–
2000-V Human-Body Model (A114-A)  
200-V Machine Model (A115-A)  
Typical VOLP (Output Ground Bounce)  
<0.8 V at VCC = 3.3 V, TA = 25°C  
1000-V Charged-Device Model (C101)  
DCT PACKAGE  
(TOP VIEW)  
DCU PACKAGE  
(TOP VIEW)  
YZP PACKAGE  
(BOTTOM VIEW)  
4 5  
2A  
2B  
1Y  
GND  
2Y  
1B  
1A  
1B  
2Y  
V
CC  
1
2
3
4
8
7
6
5
3 6  
1
2
8
7
1A  
1B  
V
CC  
1Y  
2B  
2A  
2
7
1A  
1 8  
V
CC  
1Y  
2B  
2A  
GND  
3
4
6
5
2Y  
GND  
See mechanical drawings for dimensions.  
DESCRIPTION/ORDERING INFORMATION  
This dual 2-input exclusive-OR gate is designed for 1.65-V to 5.5-V VCC operation.  
The SN74LVC2G86 performs the Boolean function Y = A B or Y = AB + AB in positive logic.  
NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the die as the  
package.  
A common application is as a true/complement element. If the input is low, the other input is reproduced in true  
form at the output. If the input is high, the signal on the other input is reproduced inverted at the output.  
This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs,  
preventing damaging current backflow through the device when it is powered down.  
ORDERING INFORMATION  
TA  
PACKAGE(1)  
ORDERABLE PART NUMBER  
TOP-SIDE MARKING(2)  
_ _ _CH_  
NanoFree™ – WCSP (DSBGA)  
0.23-mm Large Bump – YZP (Pb-free)  
SSOP – DCT  
Reel of 3000 SN74LVC2G86YZPR  
Reel of 3000 SN74LVC2G86DCTR  
Reel of 3000 SN74LVC2G86DCUR  
C86_ _ _  
–40°C to 85°C  
VSSOP – DCU  
C86_  
Reel of 250  
SN74LVC2G86DCUT  
(1) Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at  
www.ti.com/sc/package.  
(2) DCT: The actual top-side marking has three additional characters that designate the year, month, and assembly/test site.  
DCU: The actual top-side marking has one additional character that designates the assembly/test site.  
YZP: The actual top-side marking has three preceding characters to denote year, month, and sequence code, and one following  
character to designate the assembly/test site. Pin 1 identifier indicates solder-bump composition (1 = SnPb, • = Pb-free).  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas  
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
NanoFree is a trademark of Texas Instruments.  
PRODUCTION DATA information is current as of publication date.  
Copyright © 2001–2007, Texas Instruments Incorporated  
Products conform to specifications per the terms of the Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  
1234567...14

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SN74LVC2G86DCTRG4 替代型号

型号 品牌 替代类型 描述 数据表
SN74LVC2G86DCTR TI

完全替代

 DUAL 2-INPUT EXCLUSIVE OR GATE

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