SN74LVC2G86
DUAL 2-INPUT EXCLUSIVE-OR GATE
www.ti.com
SCES360F–AUGUST 2001–REVISED MAY 2005
FEATURES
DCT OR DCU PACKAGE
(TOP VIEW)
•
Available in the Texas Instruments
NanoStar™ and NanoFree™ Packages
1A
1B
2Y
V
CC
1
2
3
4
8
7
6
5
•
•
•
•
•
•
Supports 5-V VCC Operation
1Y
2B
2A
Inputs Accept Voltages to 5.5 V
Max tpd of 4.7 ns at 3.3 V
GND
Low Power Consumption, 10-µA Max ICC
±24-mA Output Drive at 3.3 V
YEA, YEP, YZA, OR YZP PACKAGE
(BOTTOM VIEW)
Typical VOLP (Output Ground Bounce) <0.8 V
at VCC = 3.3 V, TA = 25°C
•
•
•
•
Typical VOHV (Output VOH Undershoot) >2 V at
VCC = 3.3 V, TA = 25°C
4
3
2
1
5
6
7
8
GND
2Y
2A
2B
1Y
V
1B
1A
Ioff Supports Partial-Power-Down Mode
Operation
CC
Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II
ESD Protection Exceeds JESD 22
– 2000-V Human-Body Model (A114-A)
– 200-V Machine Model (A115-A)
– 1000-V Charged-Device Model (C101)
DESCRIPTION/ORDERING INFORMATION
This dual 2-input exclusive-OR gate is designed for 1.65-V to 5.5-V VCC operation.
The SN74LVC2G86 performs the Boolean function Y = A B or Y = AB + AB in positive logic.
ORDERING INFORMATION
TA
PACKAGE(1)
ORDERABLE PART NUMBER
TOP-SIDE MARKING(2)
NanoStar™ – WCSP (DSBGA)
0.17-mm Small Bump – YEA
SN74LVC2G86YEAR
NanoFree™ – WCSP (DSBGA)
0.17-mm Small Bump – YZA (Pb-free)
SN74LVC2G86YZAR
SN74LVC2G86YEPR
SN74LVC2G86YZPR
Reel of 3000
_ _ _CH_
NanoStar™ – WCSP (DSBGA)
0.23-mm Large Bump – YEP
–40°C to 85°C
NanoFree™ – WCSP (DSBGA)
0.23-mm Large Bump – YZP (Pb-free)
SSOP – DCT
Reel of 3000 SN74LVC2G86DCTR
Reel of 3000 SN74LVC2G86DCUR
C86_ _ _
C86_
VSSOP – DCU
Reel of 250
SN74LVC2G86DCUT
(1) Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at
www.ti.com/sc/package.
(2) DCT: The actual top-side marking has three additional characters that designate the year, month, and assembly/test site.
DCU: The actual top-side marking has one additional character that designates the assembly/test site.
YEA/YZA, YEP/YZP: The actual top-side marking has three preceding characters to denote year, month, and sequence code, and one
following character to designate the assembly/test site. Pin 1 identifier indicates solder-bump composition (1 = SnPb, • = Pb-free).
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
NanoStar, NanoFree are trademarks of Texas Instruments.
PRODUCTION DATA information is current as of publication date.
Copyright © 2001–2005, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.