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SN74LVC2T45DCTRE4

更新时间： 2024-11-24 22:19:11
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德州仪器 - TI 总线收发器输出元件
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22页 426K
描述
DUAL BIT DUAL SUPPLY BUS TRANSCEIVER WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS

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SN74LVC2T45DCTRE4 数据手册

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SCES516E − DECEMBER 2003 − REVISED MAY 2004  
D
D
Available in the Texas Instruments  
NanoStarand NanoFreePackages  
Fully Configurable Dual-Rail Design Allows  
Each Port to Operate Over the Full 1.65-V to  
5.5-V Power-Supply Range  
D
D
I
Supports Partial-Power-Down Mode  
off  
Operation  
Max Data Rates  
− 420 Mbps (3.3-V to 5-V Translation)  
− 210 Mbps (Translate to 3.3 V)  
− 140 Mbps (Translate to 2.5 V)  
− 75 Mbps (Translate to 1.8 V)  
D
V
Isolation Feature − If Either V  
Input  
CC  
CC  
Is at GND, Both Ports Are in the  
High-Impedance State  
D
D
Latch-Up Performance Exceeds 100 mA Per  
JESD 78, Class II  
D
D
D
DIR Input Circuit Referenced to V  
CCA  
ESD Protection Exceeds JESD 22  
− 2000-V Human-Body Model (A114-A)  
− 200-V Machine Model (A115-A)  
Low Power Consumption, 10-µA Max I  
24-mA Output Drive at 3.3 V  
CC  
− 1000-V Charged-Device Model (C101)  
DCT OR DCU PACKAGE  
(TOP VIEW)  
YEP OR YZP PACKAGE  
(BOTTOM VIEW)  
4 5  
3 6  
2 7  
1 8  
GND  
A2  
A1  
DIR  
B2  
B1  
V
V
1
2
3
4
8
7
6
5
V
B1  
B2  
DIR  
CCA  
A1  
A2  
CCB  
V
GND  
CCA  
CCB  
description/ordering information  
This dual-bit noninverting bus transceiver uses two separate configurable power-supply rails. The A port is  
designed to track V . V accepts any supply voltage from 1.65 V to 5.5 V. The B port is designed to track  
CCA CCA  
V
. V  
accepts any supply voltage from 1.65 V to 5.5 V. This allows for universal low-voltage bidirectional  
CCB CCB  
translation between any of the 1.8-V, 2.5-V, 3.3-V, and 5-V voltage nodes.  
The SN74LVC2T45 is designed for asynchronous communication between data buses. The device transmits  
data from the A bus to the B bus or from the B bus to the A bus, depending on the logic level at the  
direction-control (DIR) input.  
ORDERING INFORMATION  
ORDERABLE  
PART NUMBER  
TOP-SIDE  
MARKING  
†
T
A
PACKAGE  
‡
NanoStar− WCSP (DSBGA)  
0.23-mm Large Bump − YEP  
SN74LVC2T45YEPR  
SN74LVC2T45YZPR  
Reel of 3000  
_ _ _TB_  
NanoFree− WCSP (DSBGA)  
0.23-mm Large Bump − YZP (Pb-free)  
−40°C to 85°C  
Reel of 3000  
Reel of 250  
Reel of 3000  
SN74LVC2T45DCTR  
SN74LVC2T45DCTT  
SN74LVC2T45DCUR  
SSOP − DCT  
CT2_ _ _  
CT2_  
VSSOP − DCU  
Reel of 250  
SN74LVC2T45DCUT  
†
‡
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at  
www.ti.com/sc/package.  
DCT: The actual top-side marking has three additional characters that designate the year, month, and assembly/test site.  
DCU: The actual top-side marking has one additional character that designates the assembly/test site.  
YEP/YZP: The actual top-side marking has three preceding characters to denote year, month, and sequence code, and one  
following character to designate the assembly/test site. Pin  
1 identifier indicates solder-bump composition  
(1 = SnPb, • = Pb-free).  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
NanoStar and NanoFree are trademarks of Texas Instruments.  
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Copyright 2004, Texas Instruments Incorporated  
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ꢡ ꢥ ꢢ ꢡꢚ ꢛꢯ ꢝꢜ ꢠ ꢨꢨ ꢦꢠ ꢞ ꢠ ꢟ ꢥ ꢡ ꢥ ꢞ ꢢ ꢪ  
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1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265  
1234567...22

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SN74LVC2T45DCTRE4 替代型号

型号 品牌 替代类型 描述 数据表
SN74LVC2T45DCTTG4 TI

完全替代

 DUAL-BIT DUAL-SUPPLY BUS TRANSCEIVER WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUT
SN74LVC2T45DCTRG4 TI

完全替代

 DUAL-BIT DUAL-SUPPLY BUS TRANSCEIVER WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUT
SN74LVC2T45DCTR TI

类似代替

 DUAL BIT DUAL SUPPLY BUS TRANSCEIVER WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUT

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