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SN74LVC2T45-Q1 PDF预览

SN74LVC2T45-Q1

更新时间: 2024-02-02 06:43:22
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德州仪器 - TI 总线收发器输出元件
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描述
DUAL-BIT DUAL-SUPPLY BUS TRANSCEIVER WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS

SN74LVC2T45-Q1 数据手册

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SN74LVC2T45-Q1  
www.ti.com  
SCES818 SEPTEMBER 2010  
DUAL-BIT DUAL-SUPPLY BUS TRANSCEIVER  
WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS  
Check for Samples: SN74LVC2T45-Q1  
1
FEATURES  
Qualified for Automotive Applications  
210 Mbps (Translate to 3.3 V)  
140 Mbps (Translate to 2.5 V)  
75 Mbps (Translate to 1.8 V)  
Fully Configurable Dual-Rail Design Allows  
Each Port to Operate Over the Full 1.65-V to  
5.5-V Power-Supply Range  
VCC Isolation Feature – If Either VCC Input Is at  
GND, Both Ports Are in the High-Impedance  
State  
DIR Input Circuit Referenced to VCCA  
Low Power Consumption, 10-mA Max ICC  
±24-mA Output Drive at 3.3 V  
Ioff Supports Partial-Power-Down Mode  
Operation  
Max Data Rates  
420 Mbps (3.3-V to 5-V Translation)  
DESCRIPTION/ORDERING INFORMATION  
This dual-bit noninverting bus transceiver uses two separate configurable power-supply rails. The A port is  
designed to track VCCA. VCCA accepts any supply voltage from 1.65 V to 5.5 V. The B port is designed to track  
VCCB. VCCB accepts any supply voltage from 1.65 V to 5.5 V. This allows for universal low-voltage bidirectional  
translation between any of the 1.8-V, 2.5-V, 3.3-V, and 5-V voltage nodes.  
The SN74LVC2T45-Q1 is designed for asynchronous communication between two data buses. The logic levels  
of the direction-control (DIR) input activate either the B-port outputs or the A-port outputs. The device transmits  
data from the A bus to the B bus when the B-port outputs are activated, and from the B bus to the A bus when  
the A-port outputs are activated. The input circuitry on both A and B ports always is active and must have a logic  
HIGH or LOW level applied to prevent excess ICC and ICCZ  
.
The SN74LVC2T45-Q1 is designed so that the DIR input circuit is supplied by VCCA  
.
This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs,  
preventing damaging current backflow through the device when it is powered down.  
The VCC isolation feature ensures that if either VCC input is at GND, both ports are in the high-impedance state.  
NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the die as the  
package.  
ORDERING INFORMATION  
TA  
PACKAGE(1)  
ORDERABLE PART NUMBER  
TOP-SIDE MARKING  
CAWR  
–40°C to 125°C  
VSSOP – DCU  
Reel of 3000  
SN74LVC2T45QDCURQ1  
(1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI  
website at www.ti.com.  
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas  
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
PRODUCTION DATA information is current as of publication date.  
Copyright © 2010, Texas Instruments Incorporated  
Products conform to specifications per the terms of the Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  

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