Datasheet > SiSS4402DN

SiSS4402DN

更新时间： 2024-11-25 17:01:43

品牌	Logo	应用领域
威世 - VISHAY		/
页数	文件大小	规格书
7页	189K
描述
N-Channel 40 V (D-S) MOSFET

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SiSS4402DN 数据手册

SiSS4402DN

Vishay Siliconix

www.vishay.com

N-Channel 40 V (D-S) MOSFET

FEATURES

• TrenchFET^®Gen IV power MOSFET

PowerPAK^®1212-8S

• Very low Q_gand Q_ossreduce power loss and

improve efficiency

• Optimized Q_g, Q_gd, and Q_gd/Q_gsratio reduces

switching related power loss

• 100 % R_gand UIS tested

• Material categorization: for definitions of compliance

please see www.vishay.com/doc?99912

Top View

Bottom View

APPLICATIONS

PRODUCT SUMMARY

V_DS(V)

• Synchronous rectification

• Synchronous buck converter

• High power density DC/DC

R_DS(on)max. (Ω) at V_GS= 10 V

R_DS(on)max. (Ω) at V_GS= 4.5 V

Q_gtyp. (nC)

0.0022

0.0032

21.5

• Load switching

I_D(A) ^a

128

N-Channel MOSFET

Configuration

Single

ORDERING INFORMATION

Package

Lead (Pb)-free and halogen-free

Lead (Pb)-free and halogen-free, BLR and IOL

PowerPAK 1212-8S

SiSS4402DN-T1-GE3

SiSS4402DN-T1-UE3

ABSOLUTE MAXIMUM RATINGS (T_A= 25 °C, unless otherwise noted)

PARAMETER

SYMBOL

LIMIT

+20 / -16

128

UNIT

Drain-source voltage

Gate-source voltage

V_DS

V_GS

T_C= 25 °C

T_C= 70 °C

T_A= 25 °C

T_A= 70 °C

103

Continuous drain current (T_J= 150 °C)

I_D

35.5 ^{b, c}

28 ^{b, c}

300

59.8

4.5 ^{b, c}

Pulsed drain current (t = 100 μs)

I_DM

I_S

T_C= 25 °C

T_A= 25 °C

Continuous source-drain diode current

Single pulse avalanche current

Single pulse avalanche energy

I_AS

E_AS

31.25

65.7

5 ^{b, c}

3.2 ^{b, c}

-55 to +150

260

L = 0.1 mH

T_C= 25 °C

T_C= 70 °C

T_A= 25 °C

T_A= 70 °C

Maximum power dissipation

P_D

Operating junction and storage temperature range

Soldering recommendations (peak temperature) ^c

T_J, T_stg

°C

THERMAL RESISTANCE RATINGS

PARAMETER

Maximum junction-to-ambient ^b

SYMBOL

R_thJA

R_thJC

TYPICAL

MAXIMUM

UNIT

t ≤ 10 s

Steady state

1.9

°C/W

Maximum junction-to-case (drain)

1.5

Notes

a. Based on T_C= 25 °C

b. Surface mounted on 1" x 1" FR4 board

c. t = 10 s

d. See solder profile (www.vishay.com/doc?73257). The PowerPAK 1212-8S is a leadless package. The end of the lead terminal is exposed

copper (not plated) as a result of the singulation process in manufacturing. A solder fillet at the exposed copper tip cannot be guaranteed

and is not required to ensure adequate bottom side solder interconnection

e. Rework conditions: manual soldering with a soldering iron is not recommended for leadless components

f. Maximum under steady state conditions is 63 °C/W

S23-1015-Rev. B, 27-Nov-2023

Document Number: 62186

For technical questions, contact: pmostechsupport@vishay.com

THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT

ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000

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与SiSS4402DN相关器件

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