Datasheet > SiSS50DN

SiSS50DN

更新时间： 2024-11-25 14:54:11

品牌	Logo	应用领域
威世 - VISHAY		/
页数	文件大小	规格书
7页	192K
描述
N-Channel 45 V (D-S) MOSFET

阅读下载

中文翻译

获取价格

数据手册

如果您发现信息不准确，欢迎纠错

SiSS50DN 数据手册

SiSS50DN

Vishay Siliconix

www.vishay.com

N-Channel 45 V (D-S) MOSFET

FEATURES

• TrenchFET^®Gen IV power MOSFET

PowerPAK^®1212-8S

• Very low R_DS(on)in a compact and thermally

enhanced package

• Optimized Q_g, Q_gd, and Q_gd/Q_gsratio reduces

switching related power loss

• 100 % R_gand UIS tested

• Material categorization: for definitions of compliance

please see www.vishay.com/doc?99912

Top View

Bottom View

APPLICATIONS

PRODUCT SUMMARY

V_DS(V)

R_DS(on)max. () at V_GS= 10 V

R_DS(on)max. () at V_GS= 4.5 V

Q_gtyp. (nC)

• Synchronous rectification

0.00283

0.0041

21.4

108

Single

• Synchronous buck converter

• High power density DC/DC

• Battery switching and protection

N-Channel

I_D(A)

Configuration

MOSFET

• Load switching

ORDERING INFORMATION

Package

Lead (Pb)-free and halogen-free

PowerPAK 1212-8S

SISS50DN-T1-GE3

ABSOLUTE MAXIMUM RATINGS (T_A= 25 °C, unless otherwise noted)

PARAMETER

SYMBOL

LIMIT

+20 / -16

108

UNIT

Drain-source voltage

Gate-source voltage

V_DS

V_GS

T_C= 25 °C

T_C= 70 °C

T_A= 25 °C

T_A= 70 °C

Continuous drain current (T_J= 150 °C)

I_D

29.7 ^{b, c}

23.7 ^{b, c}

300

Pulsed drain current (t = 100 μs)

I_DM

I_S

T_C= 25 °C

T_A= 25 °C

59.7

4.5 ^{b, c}

Continuous source-drain diode current

Single pulse avalanche current

Single pulse avalanche energy

I_AS

E_AS

65.7

L = 0.1 mH

T_C= 25 °C

T_C= 70 °C

T_A= 25 °C

T_A= 70 °C

Maximum power dissipation

P_D

5 ^{b, c}

3.2 ^{b, c}

-55 to +150

260

Operating junction and storage temperature range

Soldering recommendations (peak temperature) ^c

T_J, T_stg

°C

THERMAL RESISTANCE RATINGS

PARAMETER

Maximum junction-to-ambient ^b

SYMBOL

R_thJA

R_thJC

TYPICAL

MAXIMUM

UNIT

t  10 s

Steady state

1.9

°C/W

Maximum junction-to-case (drain)

1.5

Notes

a. Package limited

b. Surface mounted on 1" x 1" FR4 board

c. t = 10 s

d. See solder profile (www.vishay.com/doc?73257). The PowerPAK 1212-8S is a leadless package. The end of the lead terminal is exposed

copper (not plated) as a result of the singulation process in manufacturing. A solder fillet at the exposed copper tip cannot be guaranteed

and is not required to ensure adequate bottom side solder interconnection

e. Rework conditions: manual soldering with a soldering iron is not recommended for leadless components

f. Maximum under steady state conditions is 65 °C/W

g. T_C= 25 °C

S19-0700-Rev. A, 19-Aug-2019

Document Number: 77149

For technical questions, contact: pmostechsupport@vishay.com

THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT

ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000

12 3 4 5 6 7

中文翻译

下载PDF

与SiSS50DN相关器件

型号	品牌	获取价格	描述	数据表
SiSS5108DN	VISHAY	获取价格	N-Channel 100 V (D-S) MOSFET
SiSS5110DN	VISHAY	获取价格	N-Channel 100 V (D-S) MOSFET
SiSS5112DN	VISHAY	获取价格	N-Channel 100 V (D-S) MOSFET
SiSS52DN	VISHAY	获取价格	N-Channel 30 V (D-S) MOSFET
SiSS54DN	VISHAY	获取价格	N-Channel 30 V (D-S) MOSFET
SiSS5623DN	VISHAY	获取价格	P-Channel 60 V (D-S) MOSFET
SiSS5708DN	VISHAY	获取价格	N-Channel 150 V (D-S) MOSFET
SiSS5710DN	VISHAY	获取价格	N-Channel 150 V (D-S) MOSFET
SiSS5808DN	VISHAY	获取价格	N-Channel 80 V (D-S) MOSFET
SiSS5810DN	VISHAY	获取价格	N-Channel 80 V (D-S) MOSFET

与SiSS50DN相关文章

解析光耦仿真器：升级光耦合器技术的必要性
2024-11-18

38
英伟达新一代Blackwell GPU过热问题致交付延迟
2024-11-18

30
国产厂商思特威CMOS图像传感器芯片单月出货超1亿颗，技术创新引领行业发展
2024-11-14

58
台积电5nm和3nm产能利用率达100%，半导体行业景气度持续攀升
2024-11-14

54

产品中心

服务支持

精选活动

关于我们

帮助中心

SiSS50DN

SiSS50DN 数据手册

与SiSS50DN相关器件

与SiSS50DN相关文章

您还可以找

产品中心

服务支持

精选活动

关于我们

帮助中心

SiSS50DN

SiSS50DN 数据手册

与SiSS50DN相关器件

与SiSS50DN相关文章

您还可以找

您在本页遇到什么问题？