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SI1031-A-GM

更新时间： 2024-11-17 09:26:19
品牌 Logo 应用领域
芯科 - SILICON /
页数 文件大小 规格书
538页 4351K
描述
Ultra Low Power 128K, LCD MCU Family

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中文翻译

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SI1031-A-GM 技术参数

是否Rohs认证： 符合生命周期：Active
零件包装代码：LGA包装说明：VFLGA,
针数：85Reach Compliance Code：unknown
ECCN代码：3A991.A.2HTS代码：8542.31.00.01
风险等级：5.76具有ADC：YES
地址总线宽度：位大小：8
最大时钟频率：30 MHzDAC 通道：NO
DMA 通道：YES外部数据总线宽度：
JESD-30 代码：R-PBGA-B85长度：8 mm
I/O 线路数量：53端子数量：85
最高工作温度：85 °C最低工作温度：-40 °C
PWM 通道：YES封装主体材料：PLASTIC/EPOXY
封装代码：VFLGA封装形状：RECTANGULAR
封装形式：GRID ARRAY, VERY THIN PROFILE, FINE PITCH峰值回流温度（摄氏度）：NOT SPECIFIED
ROM可编程性：FLASH座面最大高度：0.94 mm
速度：25 MHz最大供电电压：3.8 V
最小供电电压：1.8 V标称供电电压：3.3 V
表面贴装：YES技术：CMOS
温度等级：INDUSTRIAL端子形式：BUTT
端子节距：0.5 mm端子位置：BOTTOM
处于峰值回流温度下的最长时间：NOT SPECIFIED宽度：6 mm
uPs/uCs/外围集成电路类型：MICROCONTROLLERBase Number Matches：1

SI1031-A-GM 数据手册

 浏览型号SI1031-A-GM的Datasheet PDF文件第2页浏览型号SI1031-A-GM的Datasheet PDF文件第3页浏览型号SI1031-A-GM的Datasheet PDF文件第4页浏览型号SI1031-A-GM的Datasheet PDF文件第5页浏览型号SI1031-A-GM的Datasheet PDF文件第6页浏览型号SI1031-A-GM的Datasheet PDF文件第7页 
Si102x/3x  
Ultra Low Power 128K, LCD MCU Family  
Ultra Low Power at 3.6V  
-
RF power consumption  
18.5 mA receive  
-
-
-
-
-
110 µA/MHz IBAT; DC-DC enabled  
18 mA @ +1 dBm transmit  
110 nA sleep current with data retention; POR monitor enabled  
400 nA sleep current with smaRTClock (internal LFO)  
700 nA sleep current with smaRTClock (external XTAL)  
2 µs wake-up from any sleep mode  
30 mA @ +13 dBm transmit  
85 mA @ +20 dBm transmit  
Data rate = 0.123 to 256 kbps  
Auto-frequency calibration (AFC)  
Antenna diversity and transmit/receive switch control  
Programmable packet handler  
TX and RX 64-byte FIFOs  
12-Bit; 16 Ch. Analog-to-Digital Converter  
-
-
-
Up to 75 ksps 12-bit mode or 300 ksps 10-bit mode  
Frequency hopping capability  
On-chip crystal tuning  
External pin or internal VREF (no external capacitor required)  
High-Speed 8051 µC Core  
-
On-chip PGA allows measuring voltages up to twice the reference  
voltage  
Pipelined instruction architecture; executes 70% of instructions in 1  
or 2 system clocks  
-
-
Autonomous burst mode with 16-bit automatic averaging accumu-  
lator  
Integrated temperature sensor  
Memory  
-
Up to 128 kB Flash; In-system programmable; Full read/write/erase  
functionality over the entire supply range  
Up to 8 kB internal data RAM  
Two Low Current Comparators  
-
-
Programmable hysteresis and response time  
Digital Peripherals  
-
Configurable as interrupt or reset source  
-
53 port I/O; All 5 V tolerant with high sink  
current and programmable drive strength  
Hardware SMBus™ (I2C™ compatible), 2 x SPI™, and UART  
serial ports available concurrently  
Internal 6-Bit Current Reference  
-
Up to ±500 µA; source and sink capability  
-
-
Enhanced resolution via PWM interpolation  
Integrated LCD Controller (Si102x Only)  
-
-
Four general-purpose 16-bit counter/timers  
-
Supports up to 128 segments (32x4)  
Programmable 16-bit counter/timer array with six capture/compare  
modules and watchdog timer  
-
Integrated charge pump for contrast control  
Metering-Specific Peripherals  
Clock Sources  
-
-
DC-DC buck converter allows dynamic voltage scaling for   
maximum efficiency (250 mW output)  
Precision internal oscillators: 24.5 MHz with ±2% accuracy sup-  
ports UART operation; spread-spectrum mode for reduced EMI  
-
Sleep-mode pulse accumulator with programmable switch   
de-bounce and pull-up control interfaces directly to metering sen-  
sor  
Dedicated Packet Processing Engine (DPPE) includes hardware  
AES, DMA, CRC, and encoding blocks for acceleration of wireless  
protocols  
-
-
-
Low power internal oscillator: 20 MHz  
External oscillator: Crystal, RC, C, CMOS clock  
smaRTClock oscillator: 32.768 kHz crystal or 16.4 kHz internal  
LFO with three independent alarms  
-
-
On-Chip Debug  
-
On-chip debug circuitry facilitates full-speed, non-intrusive, in-sys-  
tem debug (no emulator required)  
Provides 4 breakpoints, single stepping  
Manchester and 3 out of 6 encoder hardware for power efficient  
implementation of the wireless M-bus specification  
-
EZRadioPRO® Transceiver  
Packages  
-
-
-
-
Frequency range = 240–960 MHz  
-
–85 pin LGA (6 x 8 mm)  
Sensitivity = –121 dBm  
FSK, GFSK, and OOK modulation  
Max output power = +20 dBm or +13 dBm  
Port I/O Configuration  
CIP-51 8051  
Controller Core  
128/64/32/16 kByte  
ISP Flash Program  
Memory  
Power On  
Reset/PMU  
16  
4
Port 0-1  
Drivers  
P0.0...P1.7  
P2.4...P2.7  
P3.0...P6.7  
P7.0/C2D  
Digital Peripherals  
UART  
Wake  
Reset  
Port 2  
Drivers  
Timers  
32  
Port 3-6  
Drivers  
Debug /  
Programming  
Hardware  
0/1/2/3  
C2CK/RST  
256 Byte SRAM  
Priority  
Crossbar  
PCA/  
8192/4096 Byte XRAM  
Port 7  
Driver  
Decoder  
WDT  
C2D  
VBAT  
VDD  
DMA  
SMBus  
SPI 0  
Analog  
Power  
CRC  
Engine  
VBAT  
VDC  
RF XCVR  
(240-960 MHz,  
+20/+13 dBm)  
Digital  
Power  
Crossbar Control  
LCD (4x32)  
VREG  
AES  
Engine  
PA  
VCO  
TX  
Encoder  
EMIF  
SFR  
Bus  
VBATDC  
IND  
AGC  
LNA  
DC/DC Buck  
Converter  
SYSCLK  
RXp  
RXn  
Pulse Counter  
EZRadioPro SPI 1  
Precision  
24.5 MHz  
Oscillator  
GNDDC  
Mixer  
PGA  
ADC  
Low Power  
20 MHz  
Oscillator  
Analog Peripherals  
LCD Charge  
Pump  
CAP  
Digital  
Modem  
External  
VREF  
Internal  
VREF  
External  
Oscillator  
Circuit  
Delta  
Sigma  
Modulator  
XTAL1  
XTAL2  
VDD  
VREF  
A
M
U
X
12-bit  
Temp  
Sensor  
SDN  
75ksps  
ADC  
Digital  
Logic  
Enhanced  
smaRTClock  
Oscillator  
nIRQ  
GPIOx  
XTAL3  
XTAL4  
3
GND  
GND  
CP0, CP0A  
+
-
30 MHz  
XOUT  
XIN  
System Clock  
Configuration  
CP1, CP1A  
+
-
Comparators  
Rev. 0.3 11/11  
Copyright © 2011 by Silicon Laboratories  
Si102x/3x  
This information applies to a product under development. Its characteristics and specifications are subject to change without notice.  
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