Datasheet > MPC931FAR2

MPC931FAR2

更新时间： 2024-11-04 14:53:55

品牌	Logo	应用领域
艾迪悌 - IDT		PC 驱动输出元件逻辑集成电路
页数	文件大小	规格书
12页	141K
描述
PLL Based Clock Driver, LVCMOS/LVTTL Series, 6 True Output(s), 0 Inverted Output(s), CMOS, PQFP32, PLASTIC, TQFP-32

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MPC931FAR2 技术参数

是否无铅：	含铅	是否Rohs认证：	不符合
生命周期：	Obsolete	零件包装代码：	QFP
包装说明：	LQFP,	针数：	32
Reach Compliance Code：	not_compliant	ECCN代码：	EAR99
HTS代码：	8542.39.00.01	风险等级：	5.47
Is Samacsys：	N	其他特性：	WITH POWER-ON RESET; RESET & OUTPUT ENABLE ON THE SAME LINE; MEETS POWER PC SKEW REQUIREMENTS
系列：	LVCMOS/LVTTL	输入调节：	DIFFERENTIAL MUX
JESD-30 代码：	S-PQFP-G32	JESD-609代码：	e0
长度：	7 mm	逻辑集成电路类型：	PLL BASED CLOCK DRIVER
功能数量：	1	反相输出次数：
端子数量：	32	实输出次数：	6
最高工作温度：	70 °C	最低工作温度：
输出特性：	3-STATE	封装主体材料：	PLASTIC/EPOXY
封装代码：	LQFP	封装形状：	SQUARE
封装形式：	FLATPACK, LOW PROFILE	峰值回流温度（摄氏度）：	225
认证状态：	Not Qualified	Same Edge Skew-Max（tskwd）：	0.6 ns
座面最大高度：	1.6 mm	最大供电电压 (Vsup)：	3.465 V
最小供电电压 (Vsup)：	3.135 V	标称供电电压 (Vsup)：	3.3 V
表面贴装：	YES	技术：	CMOS
温度等级：	COMMERCIAL	端子面层：	Tin/Lead (Sn/Pb)
端子形式：	GULL WING	端子节距：	0.8 mm
端子位置：	QUAD	处于峰值回流温度下的最长时间：	30
宽度：	7 mm	最小 fmax：	31.25 MHz
Base Number Matches：	1

MPC931FAR2 数据手册

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SEMICONDUCTOR TECHNICAL DATA

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The MPC930/931 is a 3.3V compatible, PLL based clock driver device

targeted for high performance clock applications. With output frequencies

of up to 150MHz and output skews of 300ps the MPC930/931 is ideal for

the most demanding clock distribution designs. The device employs a

fully differential PLL design to minimize cycle to cycle and long term jitter.

This parameter is of significant importance when the clock driver is pro-

viding the reference clock for PLL’s on board todays microprocessors and

ASiC’s. The device offers 6 low skew outputs, and a choice between

internal or external feedback. The feedback option adds to the flexibility of

the device, providing numerous input to output frequency relationships.

LOW VOLTAGE

PLL CLOCK DRIVER

• On–Board Crystal Oscillator (MPC930)

• Differential LVPECL Reference Input (MPC931)

• Fully Integrated PLL

• Output Shut Down Mode

• Output Frequency up to 150MHz

• Compatible with PowerPC and Intel Microprocessors

• 32–Lead TQFP Packaging

• Power Down Mode

FA SUFFIX

32–LEAD TQFP PACKAGE

CASE 873A–02

•

100ps Typical Cycle–to–Cycle Jitter

The MPC930 and MPC931 are very similar in basic functionality, but

there are some minor differences. The MPC931 has been optimized for

use as a zero delay buffer. In addition to tighter specification limits on the

phase offset of the device, a higher speed VCO has been used on the

MPC931. The MPC930, on the other hand, is more optimized for use as a

clock generator. When choosing between the 930 and 931, pay special

attention to the differences in the AC parameters of each device.

The MPC930/931 offers two power saving features for power conscious portable or “green” designs. The power down pin will

seemlessly reduce all of the clock rates by one half so that the system will run at half the potential clock rate to extend battery life.

The POWER_DN pin is synchronized internally to the slowest output clock rate. This allows the transition in and out of the

power–down mode to be output glitch free. In addition, the shut down control pins will turn off various combinations of clock

outputs while leaving a subset active to allow for total processor shut down while maintaining system monitors to “wake up” the

system when signaled. During shut down, the PLL will remain locked, if internal feedback is used, so that wake up time will be

minimized. The shut down and power down pins can be combined for the ultimate in power savings. The Shut_Dn pins are

synchronized to the clock internal to the chip to eliminate the possibility of generating runt pulses.

The MPC930/931 devices offer a great deal of flexibility in what is used as the PLL reference. The MPC930 offers an inte-

grated crystal oscillator that allows for an inexpensive crystal to be used as the frequency reference. For more information on the

crystal oscillator please refer to the applications section of this data sheet. In those applications where the 930/931 will be used to

regenerate clocks from an existing source or as a zero delay buffer, alternative reference clock inputs are provided. Both devices

offer an LVCMOS input that can be used as the PLL reference. In addition the MPC931 replaces the crystal oscillator inputs with

a differential PECL reference clock input that allows the device to be used in mixed technology clock distribution trees.

An internal feedback divide by 8 of the VCO frequency is compared with the input reference provided by the on–board crystal

oscillator when the internal feedback is selected. The on–board crystal oscillator requires no external components other than a

series resonant crystal (see Applications Information section for more on crystals). The internal VCO is running at 8x the input

reference clock. The outputs can be configured to run at 4x, 2x, 1.25x or 0.66x the input reference frequency. If the external

feedback is selected, one of the MPC931’s outputs must be connected to the Ext_FB pin. Using the external feedback, numerous

input/output frequency relationships can be developed.

The MPC930/931 is fully 3.3V compatible and requires no external loop filter components. All control inputs accept LVCMOS

or LVTTL compatible levels while the outputs provide LVCMOS levels with the capability to drive terminated 50Ω transmission

lines. For series terminated applications, each output can drive two 50Ω transmission lines, effectively increasing the fanout to

1:12. The device is packaged in a 32–lead TQFP package to provide the optimum combination of board density and cost.

PowerPC is a trademark of International Business Machines Corporation. Pentium is a trademark of Intel Corporation.

MOTOROLA ADVANCED CLOCK DRIVERS DEVICE DATA

12 3 4 5 6 7...12

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与MPC931FAR2相关器件

型号	品牌	获取价格	描述	数据表
MPC932	FREESCALE	获取价格	LOW VOLTAGE PLL CLOCK DRIVER
MPC932	MOTOROLA	获取价格	LOW VOLTAGE PLL CLOCK DRIVER
MPC932FA	IDT	获取价格	PLL Based Clock Driver, 932 Series, 6 True Output(s), 0 Inverted Output(s), PQFP32, TQFP-3
MPC932FA	MOTOROLA	获取价格	PLL Based Clock Driver, MPC900 Series, 6 True Output(s), 0 Inverted Output(s), PQFP32, PLA
MPC932FAR2	NXP	获取价格	932 SERIES, PLL BASED CLOCK DRIVER, 6 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQFP32, PLASTI
MPC932FAR2	MOTOROLA	获取价格	MPC900 SERIES, PLL BASED CLOCK DRIVER, 6 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQFP32, PLA
MPC932PFA	MOTOROLA	获取价格	PLL Based Clock Driver, 6 True Output(s), 0 Inverted Output(s), CMOS, PQFP32, TQFP-32
MPC9330	MOTOROLA	获取价格	3.3V / 2.5V 1:6 LVCMOS PLL CLOCK GENERATOR
MPC9330AC	NXP	获取价格	120MHz, OTHER CLOCK GENERATOR, PQFP32, LEAD FREE, LQFP-32
MPC9330FA	NXP	获取价格	IC,MISCELLANEOUS CLOCK GENERATOR,CMOS,QFP,32PIN,PLASTIC

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