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MC100EP210SFAG PDF预览

MC100EP210SFAG

更新时间: 2024-11-18 05:22:27
品牌 Logo 应用领域
安森美 - ONSEMI 时钟驱动器逻辑集成电路
页数 文件大小 规格书
7页 97K
描述
2.5V 1:5 Dual Differential LVDS Compatible Clock Driver

MC100EP210SFAG 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Active零件包装代码:QFP
包装说明:LQFP, QFP32,.35SQ,32针数:32
Reach Compliance Code:compliantHTS代码:8542.39.00.01
风险等级:2.04系列:100E
输入调节:DIFFERENTIALJESD-30 代码:S-PQFP-G32
JESD-609代码:e3长度:7 mm
逻辑集成电路类型:LOW SKEW CLOCK DRIVER湿度敏感等级:2
功能数量:2反相输出次数:
端子数量:32实输出次数:5
最高工作温度:85 °C最低工作温度:-40 °C
封装主体材料:PLASTIC/EPOXY封装代码:LQFP
封装等效代码:QFP32,.35SQ,32封装形状:SQUARE
封装形式:FLATPACK, LOW PROFILE峰值回流温度(摄氏度):260
电源:2.5 VProp。Delay @ Nom-Sup:0.675 ns
传播延迟(tpd):0.65 ns认证状态:Not Qualified
Same Edge Skew-Max(tskwd):0.025 ns座面最大高度:1.6 mm
子类别:Clock Drivers最大供电电压 (Vsup):2.625 V
最小供电电压 (Vsup):2.375 V标称供电电压 (Vsup):2.5 V
表面贴装:YES技术:ECL
温度等级:INDUSTRIAL端子面层:Tin (Sn)
端子形式:GULL WING端子节距:0.8 mm
端子位置:QUAD处于峰值回流温度下的最长时间:40
宽度:7 mmBase Number Matches:1

MC100EP210SFAG 数据手册

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MC100EP210S  
2.5Vꢀ1:5 Dual Differential  
LVDS Compatible Clock  
Driver  
Description  
http://onsemi.com  
MARKING  
The MC100EP210S is a low skew 1−to−5 dual differential driver,  
designed with LVDS clock distribution in mind. The LVDS or  
LVPECL input signals are differential and the signal is fanned out to  
five identical differential LVDS outputs.  
DIAGRAM*  
The EP210S specifically guarantees low output−to−output skew.  
Optimal design, layout, and processing minimize skew within a device  
and from device to device.  
Two internal 50 W resistors are provided across the inputs. For  
LVDS inputs, VTA and VTB pins should be unconnected. For  
MC100  
EP210S  
AWLYYWWG  
LQFP−32  
FA SUFFIX  
CASE 873A  
LVPECL inputs, VTA and VTB pins should be connected to the V  
TT  
(V − 2.0 V) supply.  
CC  
Designers can take advantage of the EP210S performance to  
distribute low skew LVDS clocks across the backplane or the board.  
1
Features  
MCxxx  
EP210S  
ALYWG  
20 ps Typical Output−to−Output Skew  
85 ps Typical Device−toDevice Skew  
550 ps Typical Propagation Delay  
32  
1
QFN32  
MN SUFFIX  
CASE 488AM  
The 100 Series Contains Temperature Compensation  
Maximum Frequency > 1 GHz Typical  
Operating Range: V = 2.375 V to 2.625 V with V = 0 V  
xxx  
A
= 10 or 100  
CC  
EE  
= Assembly Location  
Internal 50 W Input Termination Resistors  
LVDS Input/Output Compatible  
Pb−Free Packages are Available*  
WL, L = Wafer Lot  
YY, Y  
= Year  
WW, W = Work Week  
G
= Pb−Free Package  
*For additional marking information, refer to  
Application Note AND8002/D.  
ORDERING INFORMATION  
See detailed ordering and shipping information in the package  
dimensions section on page 5 of this data sheet.  
*For additional information on our Pb−Free strategy and soldering details, please  
download the ON Semiconductor Soldering and Mounting Techniques  
Reference Manual, SOLDERRM/D.  
© Semiconductor Components Industries, LLC, 2006  
1
Publication Order Number:  
March, 2006 − Rev. 8  
MC100EP210S/D  

MC100EP210SFAG 替代型号

型号 品牌 替代类型 描述 数据表
MC100EP210SFATWG ONSEMI

完全替代

2.5V 1:5 Dual Differential LVDS Compatible Clock Driver
MC100LVEP111FARG ONSEMI

类似代替

2.5V / 3.3V 1:10 Differential ECL/PECL/HSTL Clock Driver
MC100LVEP111FAG ONSEMI

类似代替

2.5V / 3.3V 1:10 Differential ECL/PECL/HSTL Clock Driver

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