Datasheet > MC100EP221TBR2

MC100EP221TBR2

更新时间： 2024-11-01 14:53:11

品牌	Logo	应用领域
摩托罗拉 - MOTOROLA		驱动输出元件逻辑集成电路
页数	文件大小	规格书
8页	130K
描述
100E SERIES, LOW SKEW CLOCK DRIVER, 20 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQFP52, EXPOSED PAD, PLASTIC, LQFP-52

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技术参数
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MC100EP221TBR2 技术参数

生命周期：	Obsolete	零件包装代码：	QFP
包装说明：	HLQFP,	针数：	52
Reach Compliance Code：	unknown	HTS代码：	8542.39.00.01
风险等级：	5.84	其他特性：	ECL MODE: VCC = 0V WITH VEE = -2.375V TO -3.8V
系列：	100E	输入调节：	DIFFERENTIAL MUX
JESD-30 代码：	S-PQFP-G52	长度：	10 mm
逻辑集成电路类型：	LOW SKEW CLOCK DRIVER	功能数量：	1
反相输出次数：		端子数量：	52
实输出次数：	20	最高工作温度：	85 °C
最低工作温度：	-40 °C	封装主体材料：	PLASTIC/EPOXY
封装代码：	HLQFP	封装形状：	SQUARE
封装形式：	FLATPACK, HEAT SINK/SLUG, LOW PROFILE	传播延迟（tpd）：	0.71 ns
认证状态：	Not Qualified	Same Edge Skew-Max（tskwd）：	0.05 ns
座面最大高度：	1.7 mm	最大供电电压 (Vsup)：	3.8 V
最小供电电压 (Vsup)：	2.375 V	标称供电电压 (Vsup)：	2.5 V
表面贴装：	YES	技术：	ECL
温度等级：	INDUSTRIAL	端子形式：	GULL WING
端子节距：	0.65 mm	端子位置：	QUAD
宽度：	10 mm	Base Number Matches：	1

MC100EP221TBR2 数据手册

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SEMICONDUCTOR TECHNICAL DATA

Order this document

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See Upgrade Product – MC100ES6221

The MC100EP221 is a low skew 1–to–20 differential driver, designed

with clock distribution in mind. It accepts two clock sources into an input

multiplexer. The input signals can be either differential or single–ended if

the V_BBoutput is used. The selected signal is fanned out to 20 identical

differential outputs.

LOW–VOLTAGE

1:20 DIFFERENTIAL

• 270ps max. Part–to–Part Skew

• 50ps max. Output–to–Output Skew

• Differential Design

ECL/PECL CLOCK DRIVER

• V_BBOutput

• Voltage and Temperature Compensated Outputs

• Supports 3.3V and 2.5V, ECL and PECL Operation

• Supports HSTL and PECL Clock Systems

The EP221 is specifically designed, modeled and produced with low

skew as the key goal. Optimal design and layout serve to minimize gate–

to–gate skew within a device, and empirical modeling is used to deter-

mine process control limits that ensure consistent t_pddistributions from lot

to lot. The net result is a dependable, guaranteed low skew device.

To ensure that the tight skew specification is met it is necessary that

both sides of the differential output are terminated into 50Ω, even if only

one side is being used. In most applications, all ten differential pairs will

be used and therefore terminated. In the case where fewer than ten pairs

are used, it is necessary to terminate at least the output pairs on the same

package side as the pair(s) being used on that side, in order to maintain

minimum skew. Failure to do this will result in small degradations of prop-

agation delay (on the order of 10–20ps) of the output(s) being used

which, while not being catastrophic to most designs, will mean a loss of

skew margin.

TB SUFFIX

52–LEAD LQFP PACKAGE

EXPOSED PAD

CASE 1336

The MC100EP221, as with most other ECL devices, can be operated from a positive V_CCsupply in PECL mode. This allows

the EP221 to be used for high performance clock distribution in +3.3V or +2.5V systems. Designers can take advantage of the

EP221’s performance to distribute low skew clocks across the backplane. In a PECL environment, series or Thevenin line

terminations are typically used as they require no additional power supplies.

Rev 1

MOTOROLA ADVANCED CLOCK DRIVERS DEVICE DATA

639

12 3 4 5 6 7 8

中文翻译

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与MC100EP221TBR2相关器件

型号	品牌	获取价格	描述	数据表
MC100EP223	FREESCALE	获取价格	Low-Voltage 1:22 Differential PECL/HSTL Clock Driver
MC100EP223	MOTOROLA	获取价格	Low-Voltage 1:22 Differential PECL/HSTL Clock Driver
MC100EP223FA	MOTOROLA	获取价格	Low Skew Clock Driver, 100E Series, 22 True Output(s), 0 Inverted Output(s), ECL, PQFP64,
MC100EP223TC	FREESCALE	获取价格	Low-Voltage 1:22 Differential PECL/HSTL Clock Driver
MC100EP223TC	MOTOROLA	获取价格	Low-Voltage 1:22 Differential PECL/HSTL Clock Driver
MC100EP29	ONSEMI	获取价格	3.3V / 5V ECL Dual Differential Data and Clock D Flip−Flop With Set and Reset
MC100EP29DT	ONSEMI	获取价格	3.3V / 5V ECL Dual Differential Data and Clock D Flip-Flop With Set and Reset
MC100EP29DTG	ONSEMI	获取价格	3.3V / 5V ECL Dual Differential Data and Clock D Flip−Flop With Set and Reset
MC100EP29DTR2	ONSEMI	获取价格	3.3V / 5V ECL Dual Differential Data and Clock D Flip-Flop With Set and Reset
MC100EP29DTR2G	ONSEMI	获取价格	3.3V / 5V ECL Dual Differential Data and Clock D Flip−Flop With Set and Reset

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