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MC100LVEP111FARG PDF预览

MC100LVEP111FARG

更新时间： 2024-02-16 12:58:03
品牌 Logo 应用领域
安森美 - ONSEMI 时钟驱动器逻辑集成电路
页数 文件大小 规格书
10页 155K
描述
2.5V / 3.3V 1:10 Differential ECL/PECL/HSTL Clock Driver

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中文翻译

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MC100LVEP111FARG 技术参数

是否无铅： 不含铅生命周期：Active
零件包装代码：QFN包装说明：HVQCCN, LCC32,.2SQ,20
针数：32Reach Compliance Code：compliant
HTS代码：8542.39.00.01Factory Lead Time：1 week
风险等级：1.14其他特性：NECL MODE OPERATING RANGE: VCC = 0V WITH VEE = -2.375V TO -3.8V
系列：100LVE输入调节：DIFFERENTIAL MUX
JESD-30 代码：S-XQCC-N32JESD-609代码：e3
长度：5 mm逻辑集成电路类型：LOW SKEW CLOCK DRIVER
湿度敏感等级：1功能数量：1
反相输出次数：端子数量：32
实输出次数：10最高工作温度：85 °C
最低工作温度：-40 °C封装主体材料：UNSPECIFIED
封装代码：HVQCCN封装等效代码：LCC32,.2SQ,20
封装形状：SQUARE封装形式：CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE
峰值回流温度（摄氏度）：260电源：+-2.375/+-3.8 V
Prop。Delay @ Nom-Sup：0.59 ns传播延迟（tpd）：0.5 ns
认证状态：Not QualifiedSame Edge Skew-Max（tskwd）：0.025 ns
座面最大高度：1 mm子类别：Clock Drivers
最大供电电压 (Vsup)：3.8 V最小供电电压 (Vsup)：2.375 V
标称供电电压 (Vsup)：2.5 V表面贴装：YES
技术：ECL温度等级：INDUSTRIAL
端子面层：Tin (Sn)端子形式：NO LEAD
端子节距：0.5 mm端子位置：QUAD
处于峰值回流温度下的最长时间：40宽度：5 mm

MC100LVEP111FARG 数据手册

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MC100LVEP111  
2.5V / 3.3Vꢀ1:10 Differential  
ECL/PECL/HSTL Clock Driver  
Description  
The MC100LVEP111 is a low skew 1−to−10 differential driver,  
designed with clock distribution in mind, accepting two clock sources into  
an input multiplexer. The PECL input signals can be either differential or  
http://onsemi.com  
MARKING  
single−ended (if the V output is used). HSTL inputs can be used when  
BB  
the LVEP111 is operating under PECL conditions.  
DIAGRAM*  
The LVEP111 specifically guarantees low output−to−output skew.  
Optimal design, layout, and processing minimize skew within a device and  
from device to device.  
To ensure tightest skew, both sides of differential outputs identically  
terminate into 50 W even if only one output is being used. If an output  
pair is unused, both outputs may be left open (unterminated) without  
affecting skew.  
MC100  
LVEP111  
AWLYYWWG  
LQFP−32  
FA SUFFIX  
CASE 873A  
32  
The MC100LVEP111, as with most other ECL devices, can be  
1
operated from a positive V supply in PECL mode. This allows the  
CC  
LVEP111 to be used for high performance clock distribution in +3.3 V or  
+2.5 V systems. Single−ended CLK input operation is limited to a V  
≥
CC  
1
3.0 V in PECL mode, or V v −3.0 V in NECL mode. Designers can  
EE  
MC100  
LVEP111  
ALYWG  
32  
1
take advantage of the LVEP111’s performance to distribute low skew  
clocks across the backplane or the board. In a PECL environment, series  
or Thevenin line terminations are typically used as they require no  
additional power supplies. For more information on using PECL,  
designers should refer to Application Note AN1406/D.  
QFN32  
MN SUFFIX  
CASE 488AM  
A
= Assembly Location  
= Year  
Features  
WL, L = Wafer Lot  
YY, Y  
• 85 ps Typical Device−to−Device Skew  
• 20 ps Typical Output−to−Output Skew  
WW, W = Work Week  
G
= Pb−Free Package  
• Jitter Less than 1 ps RMS  
• Maximum Frequency > 3 Ghz Typical  
*For additional marking information, refer to  
Application Note AND8002/D.  
• V Output  
BB  
• 430 ps Typical Propagation Delay  
ORDERING INFORMATION  
See detailed ordering and shipping information in the package  
dimensions section on page 8 of this data sheet.  
• The 100 Series Contains Temperature Compensation  
• PECL and HSTL Mode Operating Range: V = 2.375 V to 3.8 V  
CC  
with V = 0 V  
EE  
• NECL Mode Operating Range: V = 0 V  
CC  
with V = −2.375 V to −3.8 V  
EE  
• Open Input Default State  
• LVDS Input Compatible  
• Fully Compatible with MC100EP111  
• Pb−Free Packages are Available  
©
Semiconductor Components Industries, LLC, 2006  
1
Publication Order Number:  
November, 2006 − Rev. 13  
MC100LVEP111/D  
1234567...10

中文翻译

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MC100LVEP111FARG 替代型号

型号 品牌 替代类型 描述 数据表
MC100LVEP111FAG ONSEMI

完全替代

 2.5V / 3.3V 1:10 Differential ECL/PECL/HSTL Clock Driver
MC100EP210SFAG ONSEMI

类似代替

 2.5V 1:5 Dual Differential LVDS Compatible Clock Driver
MC100EP809FAG ONSEMI

类似代替

 3.3V 1:9 Differential HSTL/PECL to HSTL Clock Driver with LVTTL Clock Select and Enable

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