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MC100LVEP14DTR2G PDF预览

MC100LVEP14DTR2G

更新时间： 2024-11-18 04:11:31
品牌 Logo 应用领域
安森美 - ONSEMI 时钟驱动器逻辑集成电路光电二极管
页数 文件大小 规格书
9页 138K
描述
2.5V / 3.3V 1:5 Differential ECL/PECL/HSTL Clock Driver

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中文翻译

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MC100LVEP14DTR2G 技术参数

是否无铅： 不含铅是否Rohs认证： 符合
生命周期：Active零件包装代码：TSSOP
包装说明：TSSOP, TSSOP20,.25针数：20
Reach Compliance Code：compliantHTS代码：8542.39.00.01
风险等级：1.1Is Samacsys：N
其他特性：NECL MODE: VCC = 0V WITH VEE = -2.375V TO -3.8V系列：100LVE
输入调节：DIFFERENTIAL MUXJESD-30 代码：R-PDSO-G20
JESD-609代码：e4长度：6.5 mm
逻辑集成电路类型：LOW SKEW CLOCK DRIVER湿度敏感等级：1
功能数量：1反相输出次数：
端子数量：20实输出次数：5
最高工作温度：85 °C最低工作温度：-40 °C
封装主体材料：PLASTIC/EPOXY封装代码：TSSOP
封装等效代码：TSSOP20,.25封装形状：RECTANGULAR
封装形式：SMALL OUTLINE, THIN PROFILE, SHRINK PITCH峰值回流温度（摄氏度）：260
电源：-4.5 VProp。Delay @ Nom-Sup：0.525 ns
传播延迟（tpd）：0.475 ns认证状态：Not Qualified
Same Edge Skew-Max（tskwd）：0.025 ns座面最大高度：1.2 mm
子类别：Clock Drivers最大供电电压 (Vsup)：3.8 V
最小供电电压 (Vsup)：2.375 V标称供电电压 (Vsup)：2.5 V
表面贴装：YES技术：ECL
温度等级：INDUSTRIAL端子面层：Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式：GULL WING端子节距：0.65 mm
端子位置：DUAL处于峰值回流温度下的最长时间：40
宽度：4.4 mm最小 fmax：2000 MHz
Base Number Matches：1

MC100LVEP14DTR2G 数据手册

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MC100LVEP14  
2.5V / 3.3Vꢀ1:5 Differential  
ECL/PECL/HSTL Clock Driver  
Description  
The MC100LVEP14 is a low skew 1−to−5 differential driver, designed  
with clock distribution in mind, accepting two clock sources into an input  
multiplexer. The ECL/PECL input signals can be either differential or  
http://onsemi.com  
single−ended (if the V output is used). HSTL inputs can be used when  
BB  
the LVEP14 is operating under PECL conditions.  
The LVEP14 specifically guarantees low output−to−output skew.  
Optimal design, layout, and processing minimize skew within a device and  
from device to device.  
To ensure that the tight skew specification is realized, both sides of  
any differential output need to be terminated identically into 50 W  
even if only one output is being used. If an output pair is unused, both  
outputs may be left open (unterminated) without affecting skew.  
The common enable (EN) is synchronous, outputs are enabled/  
disabled in the LOW state. This avoids a runt clock pulse when the  
device is enabled/disabled as can happen with an asynchronous  
control. The internal flip flop is clocked on the falling edge of the input  
clock; therefore, all associated specification limits are referenced to  
the negative edge of the clock input.  
TSSOP−20  
DT SUFFIX  
CASE 948E  
MARKING DIAGRAM*  
20  
100  
VP14  
The MC100LVEP14, as with most other ECL devices, can be  
ALYWG  
operated from a positive V supply in PECL mode. This allows the  
CC  
G
LVEP14 to be used for high performance clock distribution in +3.3 V  
or +2.5 V systems. Single−ended CLK input pin operation is limited to  
1
a V ≥ 3.0 V in PECL mode, or V ≤ −3.0 V in NECL mode.  
Designers can take advantage of the LVEP14’s performance to  
distribute low skew clocks across the backplane or the board.  
CC  
EE  
A
L
Y
W
G
= Assembly Location  
= Wafer Lot  
= Year  
= Work Week  
= Pb−Free Package  
Features  
(Note: Microdot may be in either location)  
• 100 ps Device−to−Device Skew  
• 25 ps Within Device Skew  
*For additional marking information, refer to  
Application Note AND8002/D.  
• 400 ps Typical Propagation Delay  
• Maximum Frequency > 2 GHz Typical  
• The 100 Series Contains Temperature Compensation  
• PECL and HSTL Mode:  
ORDERING INFORMATION  
See detailed ordering and shipping information in the package  
dimensions section on page 6 of this data sheet.  
V
CC  
= 2.375 V to 3.8 V with V = 0 V  
EE  
• NECL Mode:  
= 0 V with V = −2.375 V to −3.8 V  
V
CC  
EE  
• LVDS Input Compatible  
• Open Input Default State  
• Pb−Free Packages are Available*  
*For additional information on our Pb−Free strategy and soldering details, please  
download the ON Semiconductor Soldering and Mounting Techniques  
Reference Manual, SOLDERRM/D.  
©
Semiconductor Components Industries, LLC, 2006  
1
Publication Order Number:  
November, 2006 − Rev. 11  
MC100LVEP14/D  
1234567...9

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MC100LVEP14DTR2G 替代型号

型号 品牌 替代类型 描述 数据表
MC100LVEP14DTG ONSEMI

完全替代

 2.5V / 3.3V 1:5 Differential ECL/PECL/HSTL Clock Driver
MC100EP14DTG ONSEMI

类似代替

 3.3V / 5V 1:5 Differential ECL/PECL/HSTL Clock Driver
MC100LVEP111FARG ONSEMI

功能相似

 2.5V / 3.3V 1:10 Differential ECL/PECL/HSTL Clock Driver

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