Datasheet > K9F2808U0A

K9F2808U0A

更新时间： 2024-11-20 22:06:51

品牌	Logo	应用领域
三星 - SAMSUNG		闪存
页数	文件大小	规格书
26页	352K
描述
16M x 8 Bit NAND Flash Memory

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数据手册

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K9F2808U0A 数据手册

K9F2808U0A-YCB0, K9F2808U0A-YIB0

FLASH MEMORY

Document Title

16M x 8 Bit NAND Flash Memory

Revision History

Revision No. History

Draft Date

Remark

0.0

0.1

0.2

Initial issue.

April 10th 1999

Advanced

Information

1. Revised real-time map-out algorithm(refer to technical notes)

July 23th 1999

Sep. 15th 1999

1. Changed device name

- KM29U128AT -> K9F2808U0A-YCB0

- KM29U128AIT -> K9F2808U0A-YIB0

0.3

1. Changed sequential row read opera tion

Mar. 21th 2000

Preliminary

Final

- The Sequential Read 1 and 2 operation is allowed only within a block

2. Changed invalid block(s) marking method prior to shipping

- The invalid block(s) information is written the 1st or 2nd page of the

invalid block(s) with 00h data

--->The invalid block(s) status is defined by the 6th byte in the spare

area. Samsung makes sure that either the 1st or 2nd page of every

invalid block has 00h data at the column address of 517.

0.4

1. Changed endurance : 1million -> 100K program/erase cycles

2. Changed invalid block(s) marking method prior to shipping

- The invalid block(s) status is defined by the 6th byte in the spare

area. Samsung makes sure that either the 1st or 2nd page of every

invalid block has 00h data at the column address of 517.

May 15th 2000

--->The invalid block(s) status is defined by the 6th byte in the spare

area. Samsung makes sure that either the 1st or 2nd page of every

invalid block has non-FFh data at the column address of 517.

0.5

0.6

1. Changed SE pin description

- SE is recommended to coupled to GND or Vcc and should not be

toggled during reading or programming.

July 17th 2000

Nov. 20th 2000

1. Changed don’t care mode in address cycles

- *X can be "High" or "Low" => *L must be set to "Low"

2. Explain how pointer operation works in detail.

3. Renamed GND input (pin # 6) on behalf of SE (pin # 6)

- The SE input controls the access of the spare area. When SE is high,

the spare area is not accessible for reading or programming. SE is rec

ommended to be coupled to GND or Vcc and should not be toggled

during reading or programming.

=> Connect this input pin to GND or set to static low state unless the

sequential read mode excluding spare area is used.

4. Updated operation for tRST timing

- If reset command(FFh) is written at Ready state, the device goes into

Busy for maximum 5us.

Note : For more detailed features and specifications including FAQ, please refer to Samsung’s Flash web site.

http://www.intl.samsungsemi.com/Memory/Flash/datasheets.html

The attached datasheets are prepared and approved by SAMSUNG Electronics. SAMSUNG Electronics CO., LTD. reserve the right

to change the specifications. SAMSUNG Electronics will evaluate and reply to your requests and questions about device. If you have

any questions, please contact the SAMSUNG branch office near you.

12 3 4 5 6 7...26

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与K9F2808U0A相关器件

型号	品牌	获取价格	描述	数据表
K9F2808U0A-	SAMSUNG	获取价格	16M x 8 Bit NAND Flash Memory
K9F2808U0A-YCB0	SAMSUNG	获取价格	16M x 8 Bit NAND Flash Memory
K9F2808U0A-YIB0	SAMSUNG	获取价格	16M x 8 Bit NAND Flash Memory
K9F2808U0B-BCB0	SAMSUNG	获取价格	Flash, 16MX8, 35ns, PBGA48
K9F2808U0B-BIB0	SAMSUNG	获取价格	Flash, 16MX8, 35ns, PBGA48
K9F2808U0B-D	SAMSUNG	获取价格	16M x 8 Bit NAND Flash Memory
K9F2808U0B-DCB0	SAMSUNG	获取价格	16M x 8 Bit NAND Flash Memory
K9F2808U0B-DCB00	SAMSUNG	获取价格	Flash, 16MX8, 35ns, PBGA63, 9 X 11 MM, 1 MM HEIGHT, 0.80 MM PITCH, TBGA-63
K9F2808U0B-DIB0	SAMSUNG	获取价格	16M x 8 Bit NAND Flash Memory
K9F2808U0B-V	SAMSUNG	获取价格	16M x 8 Bit NAND Flash Memory

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