Datasheet > IS61SF6432-9TQ

IS61SF6432-9TQ

更新时间： 2024-09-15 20:24:47

品牌	Logo	应用领域
美国芯成 - ISSI		时钟静态存储器内存集成电路
页数	文件大小	规格书
16页	117K
描述
Cache SRAM, 64KX32, 9ns, CMOS, PQFP100, TQFP-100

阅读下载

中文翻译

获取价格

技术参数
数据手册

如果您发现信息不准确，欢迎纠错

IS61SF6432-9TQ 技术参数

是否Rohs认证：	不符合	生命周期：	Obsolete
零件包装代码：	QFP	包装说明：	LQFP, QFP100,.63X.87
针数：	100	Reach Compliance Code：	not_compliant
ECCN代码：	3A991.B.2.A	HTS代码：	8542.32.00.41
风险等级：	5.88	Is Samacsys：	N
最长访问时间：	9 ns	其他特性：	SELF-TIMED WRITE; BURST COUNTER; BYTE WRITE; LINEAR/INTERLEAVED BURST SEQUENCE
最大时钟频率 (fCLK)：	77 MHz	I/O 类型：	COMMON
JESD-30 代码：	R-PQFP-G100	JESD-609代码：	e0
长度：	20 mm	内存密度：	2097152 bit
内存集成电路类型：	CACHE SRAM	内存宽度：	32
功能数量：	1	端子数量：	100
字数：	65536 words	字数代码：	64000
工作模式：	SYNCHRONOUS	最高工作温度：	70 °C
最低工作温度：		组织：	64KX32
输出特性：	3-STATE	封装主体材料：	PLASTIC/EPOXY
封装代码：	LQFP	封装等效代码：	QFP100,.63X.87
封装形状：	RECTANGULAR	封装形式：	FLATPACK, LOW PROFILE
并行/串行：	PARALLEL	电源：	3.3 V
认证状态：	Not Qualified	座面最大高度：	1.6 mm
最大待机电流：	0.01 A	最小待机电流：	3.14 V
子类别：	SRAMs	最大压摆率：	0.3 mA
最大供电电压 (Vsup)：	3.63 V	最小供电电压 (Vsup)：	3.135 V
标称供电电压 (Vsup)：	3.3 V	表面贴装：	YES
技术：	CMOS	温度等级：	COMMERCIAL
端子面层：	Tin/Lead (Sn/Pb)	端子形式：	GULL WING
端子节距：	0.65 mm	端子位置：	QUAD
宽度：	14 mm	Base Number Matches：	1

IS61SF6432-9TQ 数据手册

IS61SF6432

64K x 32 SYNCHRONOUS

ISSI

JUNE 2001

FLOW-THROUGH STATIC RAM

FEATURES

DESCRIPTION

The ISSI IS61SF6432 is a high-speed, low-power synchro-

nous static RAM designed to provide a burstable, high-

performance, secondary cache for the Pentium™, 680X0™,

and PowerPC™ microprocessors. It is organized as 65,536

words by 32 bits, fabricated with ISSI's advanced CMOS

technology. The device integrates a 2-bit burst counter, high-

speed SRAM core, and high-drive capability outputs into a

single monolithic circuit. All synchronous inputs pass through

registers controlled by a positive-edge-triggered single clock

input.

• Fast access time: 9 ns, 10 ns

• Internal self-timed write cycle

• Individual Byte Write Control and Global Write

• Clock controlled, registered address, data and

control

• Pentium™ or linear burst sequence control

using MODE input

• Three chip enables for simple depth expansion

and address pipelining

Write cycles are internally self-timed and are initiated by the

rising edge of the clock input. Write cycles can be from one to

four bytes wide as controlled by the write control inputs.

• Common data inputs and data outputs

• Power-down control by ZZ input

• JEDEC 100-Pin TQFP and PQFP package

• Single +3.3V power supply

Separate byte enables allow individual bytes to be written.

BW1 controls DQ1-DQ8, BW2 controls DQ9-DQ16, BW3

controlsDQ17-DQ24,BW4controlsDQ25-DQ32,conditioned

byBWEbeingLOW.ALOWonGWinputwouldcauseallbytes

to be written.

• Two Clock enables and one Clock disable to

eliminate multiple bank bus contention.

• Control pins mode upon power-up:

– FT in pipeline mode

Bursts can be initiated with either ADSP (Address Status

Processor) or ADSC (Address Status Cache Controller) input

pins. Subsequent burst addresses can be generated inter-

nally by the IS61SF6432 and controlled by the ADV (burst

address advance) input pin.

– MODE in interleave burst mode

– ZZ in normal operation mode

These control pins can be connected to GNDQ

or VCCQ to alter their power-up state

• Industrial temperature available

Asynchronoussignalsincludeoutputenable(OE),sleepmode

input(ZZ), clock(CLK)andburstmodeinput(MODE). AHIGH

input on the ZZ pin puts the SRAM in the power-down state.

When ZZ is pulled LOW (or no connect), the SRAM normally

operates after three cycles of the wake-up period. A LOW

input, i.e., GNDQ, on MODE pin selects LINEAR Burst. AVCCQ

(or no connect) on MODE pin selects INTERLEAVED Burst.

ISSI reserves the right to make changes to its products at any time without notice in order to improve design and supply the best possible product. We assume no responsibility for any

Integrated Silicon Solution, Inc. — 1-800-379-4774

Rev. B

06/28/01

12 3 4 5 6 7...16

中文翻译

下载PDF

与IS61SF6432-9TQ相关器件

型号	品牌	获取价格	描述	数据表
IS61SF6436-10PQ	ISSI	获取价格	Cache SRAM, 64KX36, 10ns, CMOS, PQFP100, PLASTIC, QFP-100
IS61SF6436-10PQI	ETC	获取价格	x36 Fast Synchronous SRAM
IS61SF6436-10TQ	ISSI	获取价格	Cache SRAM, 64KX36, 10ns, CMOS, PQFP100, TQFP-100
IS61SF6436-10TQI	ETC	获取价格	x36 Fast Synchronous SRAM
IS61SF6436-8.5PQ	ETC	获取价格	x36 Fast Synchronous SRAM
IS61SF6436-8.5TQ	ISSI	获取价格	Cache SRAM, 64KX36, 8.5ns, CMOS, PQFP100, TQFP-100
IS61SF6436-9PQ	ISSI	获取价格	Cache SRAM, 64KX36, 9ns, CMOS, PQFP100, PLASTIC, QFP-100
IS61SF6436-9TQ	ISSI	获取价格	Cache SRAM, 64KX36, 9ns, CMOS, PQFP100, TQFP-100
IS61SP12832	ETC	获取价格	128K x 32 SYNCHRONOUS PIPELINED STATIC RAM
IS61SP12832-117B	ICSI	获取价格	Standard SRAM, 128KX32, 4ns, CMOS, PQFP100,

与IS61SF6432-9TQ相关文章

摩尔斯微电子在美国约书亚树国家公园测试 Wi-Fi HaLow
2024-09-18

6
贸泽上架Tallysman TW5386智能GNSS天线
2024-09-18

6
SL74HC10N：高性能三输入与非门解析
2024-09-03

85
AIC1781A 电池充电控制器深度解析
2024-09-03

79

产品中心

服务支持

精选活动

关于我们

帮助中心

IS61SF6432-9TQ

IS61SF6432-9TQ 技术参数

IS61SF6432-9TQ 数据手册

与IS61SF6432-9TQ相关器件

与IS61SF6432-9TQ相关文章

您还可以找

产品中心

服务支持

精选活动

关于我们

帮助中心

IS61SF6432-9TQ

IS61SF6432-9TQ 技术参数

IS61SF6432-9TQ 数据手册

与IS61SF6432-9TQ相关器件

与IS61SF6432-9TQ相关文章

您还可以找

您在本页遇到什么问题？