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IPW50R140CP PDF预览

IPW50R140CP

更新时间: 2024-10-28 03:40:39
品牌 Logo 应用领域
英飞凌 - INFINEON 晶体晶体管
页数 文件大小 规格书
10页 362K
描述
CoolMOSTM Power Transistor

IPW50R140CP 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Not Recommended零件包装代码:TO-247AC
包装说明:IN-LINE, R-PSIP-T3针数:3
Reach Compliance Code:compliant风险等级:8.45
雪崩能效等级(Eas):616 mJ配置:SINGLE WITH BUILT-IN DIODE
最小漏源击穿电压:500 V最大漏极电流 (Abs) (ID):23 A
最大漏极电流 (ID):23 A最大漏源导通电阻:0.14 Ω
FET 技术:METAL-OXIDE SEMICONDUCTORJEDEC-95代码:TO-247AC
JESD-30 代码:R-PSIP-T3元件数量:1
端子数量:3工作模式:ENHANCEMENT MODE
最高工作温度:175 °C封装主体材料:PLASTIC/EPOXY
封装形状:RECTANGULAR封装形式:IN-LINE
峰值回流温度(摄氏度):NOT SPECIFIED极性/信道类型:N-CHANNEL
最大功率耗散 (Abs):192 W最大脉冲漏极电流 (IDM):56 A
认证状态:Not Qualified子类别:FET General Purpose Power
表面贴装:NO端子形式:THROUGH-HOLE
端子位置:SINGLE处于峰值回流温度下的最长时间:NOT SPECIFIED
晶体管应用:SWITCHING晶体管元件材料:SILICON
Base Number Matches:1

IPW50R140CP 数据手册

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IPW50R140CP  
Values  
typ.  
Parameter  
Symbol Conditions  
Unit  
min.  
max.  
Dynamic characteristics  
C iss  
Input capacitance  
Output capacitance  
-
-
2540  
110  
-
-
pF  
V
GS=0 V, V DS=100 V,  
f =1 MHz  
C oss  
Effective output capacitance, energy  
related5)  
C o(er)  
-
-
110  
230  
-
-
V
GS=0 V, V DS=0 V  
to 400 V  
Effective output capacitance, time  
related6)  
C o(tr)  
t d(on)  
t r  
t d(off)  
t f  
Turn-on delay time  
Rise time  
-
-
-
-
35  
14  
80  
8.0  
-
-
-
-
ns  
V
V
DD=400 V,  
GS=10 V, I D=14 A,  
Turn-off delay time  
Fall time  
R G=12.2  
Gate Charge Characteristics  
Gate to source charge  
Gate to drain charge  
Gate charge total  
Q gs  
-
-
-
-
11  
15  
48  
5.2  
-
-
nC  
Q gd  
V
V
DD=400 V, I D=14 A,  
GS=0 to 10 V  
Q g  
64  
-
V plateau  
Gate plateau voltage  
Reverse Diode  
V
V
V
GS=0 V, I F=14 A,  
V SD  
Diode forward voltage  
-
0.9  
1.2  
T j=25 °C  
t rr  
Reverse recovery time  
-
-
-
300  
5.6  
26  
-
-
-
ns  
µC  
A
V R=400 V, I F=I S,  
di F/dt =100 A/µs  
Q rr  
I rrm  
Reverse recovery charge  
Peak reverse recovery current  
1) J-STD20 and JESD22  
2) Pulse width t p limited by T j,max  
3) Repetitive avalanche causes additional power losses that can be calculated asP AV=E AR*f.  
4) I SDI D, di /dt 200A/µs, VDClink=400V, Vpeak<V(BR)DSS, Tj<Tjmax, identical low and high side switch  
5) C o(er) is a fixed capacitance that gives the same stored energy asC oss while V DS is rising from 0 to 80% V DSS.  
6) C o(tr) is a fixed capacitance that gives the same charging time asC oss while V DS is rising from 0 to 80% V DSS.  
Rev. 1.01  
page 3  
2007-02-06  

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