Datasheet > FQD3P50_09

FQD3P50_09

更新时间： 2024-11-30 12:23:39

品牌	Logo	应用领域
飞兆/仙童 - FAIRCHILD		/
页数	文件大小	规格书
9页	766K
描述
500V P-Channel MOSFET

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FQD3P50_09 数据手册

January 2009

QFET^®

FQD3P50 / FQU3P50

500V P-Channel MOSFET

Features

General Description

•

-2.1A, -500V, R

= 4.9Ω @V = -10 V

DS(on) GS

These P-Channel enhancement mode power field effect

transistors are produced using Fairchild’s proprietary,

planar stripe, DMOS technology.

This advanced technology has been especially tailored to

minimize on-state resistance, provide superior switching

performance, and withstand high energy pulse in the

avalanche and commutation mode. These devices are well

suited for electronic lamp ballast based on complimentary

half bridge.

Low gate charge ( typical 18 nC)

Low Crss ( typical 9.5 pF)

Fast switching

100% avalanche tested

Improved dv/dt capability

RoHS Compliant

●

▶

▲

●

I-PAK

FQU Series

D-PAK

FQD Series

Absolute Maximum Ratings

T = 25°C unless otherwise noted

Symbol

Parameter

FQD3P50 / FQU3P50

Units

Drain-Source Voltage

-500

-2.1

DSS

- Continuous (T = 25°C)

Drain Current

- Continuous (T = 100°C)

-1.33

-8.4

(Note 1)

Drain Current

- Pulsed

Gate-Source Voltage

± 30

250

GSS

(Note 2)

(Note 1)

(Note 3)

Single Pulsed Avalanche Energy

Avalanche Current

-2.1

Repetitive Avalanche Energy

Peak Diode Recovery dv/dt

5.0

V/ns

dv/dt

-4.5

Power Dissipation (T = 25°C) *

2.5

Power Dissipation (T = 25°C)

- Derate above 25°C

Operating and Storage Temperature Range

0.4

W/°C

°C

T , T

-55 to +150

STG

Maximum lead temperature for soldering purposes,

300

°C

1/8" from case for 5 seconds

Thermal Characteristics

Symbol

Parameter

Typ

Max

2.5

Units

°C/W

Thermal Resistance, Junction-to-Case

Thermal Resistance, Junction-to-Ambient *

Thermal Resistance, Junction-to-Ambient

θJC

θJA

110

* When mounted on the minimum pad size recommended (PCB Mount)

Rev. A2, January 2009

12 3 4 5 6 7...9

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