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FQB10N60C PDF预览

FQB10N60C

更新时间: 2024-09-15 22:25:35
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD /
页数 文件大小 规格书
9页 615K
描述
600V N-Channel MOSFET

FQB10N60C 数据手册

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TM  
QFET  
FQB10N60C / FQI10N60C  
600V N-Channel MOSFET  
General Description  
Features  
These N-Channel enhancement mode power field effect  
transistors are produced using Fairchild’s proprietary,  
planar stripe, DMOS technology.  
This advanced technology has been especially tailored to  
minimize on-state resistance, provide superior switching  
performance, and withstand high energy pulse in the  
avalanche and commutation mode. These devices are well  
suited for high efficiency switched mode power supplies,  
active power factor correction, electronic lamp ballasts  
based on half bridge topology.  
9.5A, 600V, R  
= 0.73@V = 10 V  
DS(on) GS  
Low gate charge ( typical 44 nC)  
Low Crss ( typical 18 pF)  
Fast switching  
100% avalanche tested  
Improved dv/dt capability  
D
!
D
G!  
I2-PAK  
FQI Series  
D2-PAK  
FQB Series  
G
S
G D S  
!
S
Absolute Maximum Ratings  
T = 25°C unless otherwise noted  
C
Symbol  
Parameter  
FQB10N60C / FQI10N60C  
Units  
V
V
I
Drain-Source Voltage  
600  
9.5  
DSS  
- Continuous (T = 25°C)  
Drain Current  
A
D
C
- Continuous (T = 100°C)  
3.3  
A
C
I
(Note 1)  
Drain Current  
- Pulsed  
38  
A
DM  
V
E
I
Gate-Source Voltage  
± 30  
700  
V
GSS  
AS  
(Note 2)  
(Note 1)  
(Note 1)  
(Note 3)  
Single Pulsed Avalanche Energy  
Avalanche Current  
mJ  
A
9.5  
AR  
E
Repetitive Avalanche Energy  
Peak Diode Recovery dv/dt  
15.6  
4.5  
mJ  
V/ns  
W
AR  
dv/dt  
Power Dissipation (T = 25°C)*  
3.13  
156  
A
P
Power Dissipation (T = 25°C)  
W
D
C
- Derate above 25°C  
Operating and Storage Temperature Range  
1.25  
-55 to +150  
W/°C  
°C  
T , T  
J
STG  
Maximum lead temperature for soldering purposes,  
T
300  
°C  
L
1/8" from case for 5 seconds  
Thermal Characteristics  
Symbol  
Parameter  
Typ  
--  
Max  
0.8  
Units  
°C/W  
°C/W  
°C/W  
R
R
R
Thermal Resistance, Junction-to-Case  
Thermal Resistance, Junction-to-Ambient*  
Thermal Resistance, Junction-to-Ambient  
θJC  
θJA  
θJA  
--  
40  
--  
62.5  
* When mounted on the minimum pad size recommended (PCB Mount)  
©2003 Fairchild Semiconductor Corporation  
Rev. A, October 2003  

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