TM
QFET
FQB12N50 / FQI12N50
500V N-Channel MOSFET
General Description
Features
These N-Channel enhancement mode power field effect
transistors are produced using Fairchild’s proprietary,
planar stripe, DMOS technology.
This advanced technology has been especially tailored to
minimize on-state resistance, provide superior switching
performance, and withstand high energy pulse in the
avalanche and commutation mode. These devices are well
suited for high efficiency switch mode power supplies,
power factor correction, electronic lamp ballasts based on
half bridge.
•
•
•
•
•
•
12.1A, 500V, R
= 0.49Ω @V = 10 V
DS(on) GS
Low gate charge ( typical 39 nC)
Low Crss ( typical 25 pF)
Fast switching
100% avalanche tested
Improved dv/dt capability
D
!
D
●
◀
▲
●
●
!
G
D2-PAK
FQB Series
I2-PAK
FQI Series
G
S
G D S
!
S
Absolute Maximum Ratings
T = 25°C unless otherwise noted
C
Symbol
Parameter
FQB12N50 / FQI12N50
Units
V
V
I
Drain-Source Voltage
500
12.1
DSS
- Continuous (T = 25°C)
Drain Current
A
D
C
- Continuous (T = 100°C)
7.6
A
C
I
(Note 1)
Drain Current
- Pulsed
48.4
A
DM
V
E
I
Gate-Source Voltage
± 30
V
GSS
(Note 2)
(Note 1)
(Note 1)
(Note 3)
Single Pulsed Avalanche Energy
Avalanche Current
878
mJ
A
AS
12.1
AR
E
Repetitive Avalanche Energy
Peak Diode Recovery dv/dt
17.9
mJ
V/ns
W
AR
dv/dt
4.5
P
Power Dissipation (T = 25°C) *
3.13
D
A
Power Dissipation (T = 25°C)
179
W
C
- Derate above 25°C
Operating and Storage Temperature Range
1.43
W/°C
°C
T , T
-55 to +150
J
stg
Maximum lead temperature for soldering purposes,
T
300
°C
L
1/8" from case for 5 seconds
Thermal Characteristics
Symbol
Parameter
Typ
--
Max
0.7
Units
°C/W
°C/W
°C/W
R
R
R
Thermal Resistance, Junction-to-Case
Thermal Resistance, Junction-to-Ambient *
Thermal Resistance, Junction-to-Ambient
θJC
θJA
θJA
--
40
--
62.5
* When mounted on the minimum pad size recommended (PCB Mount)
©2002 Fairchild Semiconductor Corporation
Rev. A, May 2002