DATA SHEET
www.onsemi.com
MOSFET – Dual N-Channel,
POWERTRENCH)
Pin 1
Pin 1
G1 S1 S1 S1
D1
D2
60 V, 8.2 A, 17 mW
FDMC89521L
S2 S2
G2 S2
General Description
Power 33
This device includes two 60 V N−Channel MOSFETs in a dual
Power 33 (3 mm x 3 mm MLP) package. The package is enhanced for
exceptional thermal performance.
WDFN8 3x3, 0.65P
CASE 511DG
Features
MARKING DIAGRAM
• Max r
• Max r
= 17 mW at V = 10 V, I = 8.2 A
GS D
DS(on)
DS(on)
= 27 mW at V = 4.5 V, I = 6.7 A
GS
D
$Y&Z&2&K
FDMC
89521L
• Termination is Lead−free
• These Devices are RoHS Compliant
Applications
• Battery Protection
• Load Switching
• Bridge Topologies
$Y
&Z
&2
&K
= onsemi Logo
= Assembly Plant Code
= Numeric Date Code
= Lot Code
FDMC89521L
= Specific Device Code
MOSFET MAXIMUM RATINGS (TA = 25°C unless otherwise noted)
Symbol
VDS
Parameter
Drain to Source Voltage
Ratings Units
PIN ASSIGNMENT
60
20
V
V
A
VGS
Gate to Source Voltage
G2
G1
S1
ID
Drain Current
− Continuous
− Pulsed
TA = 25°C
(Note 1a)
(Note 3)
8.2
40
S2
S2
S2
EAS
PD
Single Pulse Avalanche Energy
Power Dissipation TC = 25°C
Power Dissipation TA = 25°C
32
16
mJ
W
S1
S1
(Note 1a)
1.9
TJ, TSTG Operating and Storage Junction Temperature
Range
−55 to
+150
°C
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
N−Channel MOSFET
ORDERING INFORMATION
See detailed ordering and shipping information on page 6 of
this data sheet.
THERMAL CHARACTERISTICS
Symbol
RθJC
Parameter
Ratings
8.0
Unit
°C/W
°C/W
Thermal Resistance, Junction−to−Case
RθJA
Thermal Resistance, Junction−to−Ambient
(Note 1a)
65
RθJA
Thermal Resistance, Junction−to−Ambient
(Note 1b)
155
°C/W
© Semiconductor Components Industries, LLC, 2012
1
Publication Order Number:
February, 2023 − Rev. 2
FDMC89521L/D