5秒后页面跳转
EDE5116AFSE-4A-E PDF预览

EDE5116AFSE-4A-E

更新时间: 2024-09-18 22:49:15
品牌 Logo 应用领域
尔必达 - ELPIDA 存储内存集成电路动态存储器双倍数据速率时钟
页数 文件大小 规格书
65页 654K
描述
512M bits DDR2 SDRAM (32M words x 16 bits)

EDE5116AFSE-4A-E 技术参数

是否Rohs认证: 符合生命周期:Obsolete
零件包装代码:BGA包装说明:TFBGA, BGA84,9X15,32
针数:84Reach Compliance Code:unknown
ECCN代码:EAR99HTS代码:8542.32.00.28
风险等级:5.82Is Samacsys:N
访问模式:FOUR BANK PAGE BURST最长访问时间:0.6 ns
其他特性:AUTO/SELF REFRESH最大时钟频率 (fCLK):200 MHz
I/O 类型:COMMON交错的突发长度:4,8
JESD-30 代码:R-PBGA-B84JESD-609代码:e1
长度:13 mm内存密度:536870912 bit
内存集成电路类型:DDR DRAM内存宽度:16
功能数量:1端口数量:1
端子数量:84字数:33554432 words
字数代码:32000000工作模式:SYNCHRONOUS
最高工作温度:85 °C最低工作温度:
组织:32MX16输出特性:3-STATE
封装主体材料:PLASTIC/EPOXY封装代码:TFBGA
封装等效代码:BGA84,9X15,32封装形状:RECTANGULAR
封装形式:GRID ARRAY, THIN PROFILE, FINE PITCH峰值回流温度(摄氏度):260
电源:1.8 V认证状态:Not Qualified
刷新周期:8192座面最大高度:1.2 mm
自我刷新:YES连续突发长度:4,8
最大待机电流:0.008 A子类别:DRAMs
最大供电电压 (Vsup):1.9 V最小供电电压 (Vsup):1.7 V
标称供电电压 (Vsup):1.8 V表面贴装:YES
技术:CMOS温度等级:OTHER
端子面层:Tin/Silver/Copper (Sn/Ag/Cu)端子形式:BALL
端子节距:0.8 mm端子位置:BOTTOM
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:11 mm
Base Number Matches:1

EDE5116AFSE-4A-E 数据手册

 浏览型号EDE5116AFSE-4A-E的Datasheet PDF文件第2页浏览型号EDE5116AFSE-4A-E的Datasheet PDF文件第3页浏览型号EDE5116AFSE-4A-E的Datasheet PDF文件第4页浏览型号EDE5116AFSE-4A-E的Datasheet PDF文件第5页浏览型号EDE5116AFSE-4A-E的Datasheet PDF文件第6页浏览型号EDE5116AFSE-4A-E的Datasheet PDF文件第7页 
DATA SHEET  
512M bits DDR2 SDRAM  
EDE5116AFSE (32M words × 16 bits)  
Description  
Features  
The EDE5116AFSE is a 512M bits DDR2 SDRAM  
Power supply: VDD, VDDQ = 1.8V ± 0.1V  
organized as 8,388,608 words × 16 bits × 4 banks.  
It is packaged in 84-ball FBGA (µBGA) package.  
Double-data-rate architecture: two data transfers per  
clock cycle  
Bi-directional, differential data strobe (DQS and  
/DQS) is transmitted/received with data, to be used in  
capturing data at the receiver  
DQS is edge aligned with data for READs: center-  
aligned with data for WRITEs  
Differential clock inputs (CK and /CK)  
DLL aligns DQ and DQS transitions with CK  
transitions  
Commands entered on each positive CK edge: data  
and data mask referenced to both edges of DQS  
Four internal banks for concurrent operation  
Data mask (DM) for write data  
Burst lengths: 4, 8  
/CAS Latency (CL): 3, 4, 5  
Auto precharge operation for each burst access  
Auto refresh and self refresh modes  
Average refresh period  
7.8µs at 0°C TC ≤ +85°C  
3.9µs at +85°C < TC ≤ +95°C  
SSTL_18 compatible I/O  
Posted CAS by programmable additive latency for  
better command and data bus efficiency  
Off-Chip-Driver Impedance Adjustment and On-Die-  
Termination for better signal quality  
/DQS can be disabled for single-ended Data Strobe  
operation.  
FBGA (µBGA) package with lead free solder  
(Sn-Ag-Cu)  
RoHS compliant  
Document No. E0705E20 (Ver. 2.0)  
Date Published July 2005 (K) Japan  
Printed in Japan  
URL: http://www.elpida.com  
Elpida Memory, Inc. 2005  

与EDE5116AFSE-4A-E相关器件

型号 品牌 获取价格 描述 数据表
EDE5116AFSE-5C-E ELPIDA

获取价格

512M bits DDR2 SDRAM (32M words x 16 bits)
EDE5116AFSE-6E-E ELPIDA

获取价格

512M bits DDR2 SDRAM (32M words x 16 bits)
EDE5116AHBG-4A-E ELPIDA

获取价格

512M bits DDR2 SDRAM
EDE5116AHBG-5C-E ELPIDA

获取价格

512M bits DDR2 SDRAM
EDE5116AHBG-6E-E ELPIDA

获取价格

512M bits DDR2 SDRAM
EDE5116AHBG-8E-E ELPIDA

获取价格

512M bits DDR2 SDRAM
EDE5116AHBG-8G-E ELPIDA

获取价格

512M bits DDR2 SDRAM
EDE5116AHSE-4A-E ELPIDA

获取价格

512M bits DDR2 SDRAM
EDE5116AHSE-5C-E ELPIDA

获取价格

512M bits DDR2 SDRAM
EDE5116AHSE-6E-E ELPIDA

获取价格

512M bits DDR2 SDRAM