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74VHCT32AFT PDF预览

74VHCT32AFT

更新时间: 2024-09-15 20:04:11
品牌 Logo 应用领域
东芝 - TOSHIBA 光电二极管逻辑集成电路
页数 文件大小 规格书
7页 149K
描述
CMOS Logic ICs - 74VHC Series

74VHCT32AFT 技术参数

是否Rohs认证: 符合生命周期:Active
包装说明:TSSOP,Reach Compliance Code:unknown
风险等级:5.66系列:AHCT/VHCT/VT
JESD-30 代码:R-PDSO-G14长度:5 mm
逻辑集成电路类型:OR GATE功能数量:4
输入次数:2端子数量:14
最高工作温度:85 °C最低工作温度:-40 °C
封装主体材料:PLASTIC/EPOXY封装代码:TSSOP
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
峰值回流温度(摄氏度):NOT SPECIFIED传播延迟(tpd):8.5 ns
座面最大高度:1.2 mm最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):4.5 V标称供电电压 (Vsup):5 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子形式:GULL WING
端子节距:0.65 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:4.4 mm
Base Number Matches:1

74VHCT32AFT 数据手册

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74VHCT32AFT  
CMOS Digital Integrated Circuits Silicon Monolithic  
74VHCT32AFT  
1. Functional Description  
Quad 2-Input OR Gate  
2. General  
The 74VHCT32AFT is an advanced high speed CMOS 2-INPUT OR GATE fabricated with silicon gate C2MOS  
technology.  
It achieves the high speed operation similar to equivalent Bipolar Schottky TTL while maintaining the CMOS  
low power dissipation.  
The internal circuit is composed of 4 stages including buffer output, which provide high noise immunity and  
stable output.  
The input voltage are compatible with TTL output voltage.  
This device may be used as a level converter for interfacing 3.3 V to 5 V system.  
Input protection and output circuit ensure that 0 to 5.5 V can be applied to the input and output (Note) pins  
without regard to the supply voltage. These structure prevents device destruction due to mismatched supply and  
input/output voltages such as battery back up, hot board insertion, etc.  
Note: VCC = 0 V  
3. Features  
(1) AEC-Q100 (Rev. H) (Note 1)  
(2) Wide operating temperature range: Topr = -40 to 125  
(3) High speed: tpd = 3.8 ns (typ.) at VCC = 5.0 V  
(4) Low power dissipation: ICC = 2.0 µA (max) at Ta = 25   
(5) Compatible with TTL inputs: VIL = 0.8 V (max)  
: VIH = 2.0 V (min)  
(6) Power down protection is provided on all inputs and outputs.  
(7) Balanced propagation delays: tPLH tPHL  
(8) Low noise: VOLP = 0.8 V (max)  
(9) Pin and function compatible with the 74 series (AC/HC/AHC/LV etc.) 32 type.  
Note 1: This device is compliant with the reliability requirements of AEC-Q100. For details, contact your Toshiba sales  
representative.  
4. Packaging  
TSSOP14B  
Start of commercial production  
2015-02  
©2017 Toshiba Corporation  
2017-02-23  
Rev.3.0  
1

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