74VHCT32AM

更新时间： 2024-11-04 22:56:27

品牌	Logo	应用领域
意法半导体 - STMICROELECTRONICS		输入元件
页数	文件大小	规格书
7页	55K
描述
QUAD 2-INPUT OR GATE

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中文翻译

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数据手册

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74VHCT32AM 数据手册

74VHCT32A

QUAD 2-INPUT OR GATE

PRELIMINARY DATA

■

HIGH SPEED:t_PD=5 ns (TYP.) atV_CC=5V

LOW POWER DISSIPATION:

_CC=2 µA (MAX.) at T_A=25 ^oC

■

COMPATIBLEWITH TTL OUTPUTS:

V_IH=2V (MIN), V_IL= 0.8V(MAX)

POWERDOWN PROTECTIONON INPUTS&

OUTPUTS

SYMMETRICAL OUTPUT IMPEDANCE:

|I_OH| = I_OL= 8 mA (MIN)

BALANCEDPROPAGATIONDELAYS:

t_PLHt_PHL

OPERATING VOLTAGERANGE:

(Micro Package)

(TSSOPPackage)

ORDER CODES :

74VHCT32AM

74VHCT32AT

The internal circuit is composed of 2 stages

including buffer output, which provide high noise

immunity and stable output.

Power down protection is provided on all inputs

and outputs and 0 to 7V can be accepted on

inputs with no regard to the supply voltage. This

device can be used to interface 5V to 3V.

V_CC(OPR)= 4.5V to 5.5V

PIN AND FUNCTION COMPATIBLEWITH

74 SERIES32

IMPROVED LATCH-UP IMMUNITY

LOWNOISE:V_OLP= 0.8V(Max.)

■

All inputs and outputs are equipped with

protection circuits against static discharge, giving

them 2KV ESD immunity and transient excess

voltage.

DESCRIPTION

The 74VHCT32A is an advanced high-speed

CMOS QUAD 2-INPUT OR GATE fabricated with

sub-micron silicon gate and double-layer metal

wiring C²MOS technology.

PIN CONNECTION AND IEC LOGIC SYMBOLS

1/7

August 1999

12 3 4 5 6 7

中文翻译

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