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74VHCT32PW-Q100 PDF预览

74VHCT32PW-Q100

更新时间: 2024-11-30 00:58:07
品牌 Logo 应用领域
安世 - NEXPERIA /
页数 文件大小 规格书
15页 703K
描述
Quad 2-input OR gate

74VHCT32PW-Q100 数据手册

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74VHC32-Q100;  
74VHCT32-Q100  
Quad 2-input OR gate  
Rev. 1 — 20 December 2013  
Product data sheet  
1. General description  
The 74VHC32-Q100; 74VHCT32-Q100 are high-speed Si-gate CMOS devices and are  
pin compatible with Low-power Schottky TTL (LSTTL). They are specified in compliance  
with JEDEC standard No. 7-A.  
The 74VHC32-Q100; 74VHCT32-Q100 provide the 2-input OR function.  
This product has been qualified to the Automotive Electronics Council (AEC) standard  
Q100 (Grade 1) and is suitable for use in automotive applications.  
2. Features and benefits  
Automotive product qualification in accordance with AEC-Q100 (Grade 1)  
Specified from 40 C to +85 C and from 40 C to +125 C  
Balanced propagation delays  
All inputs have Schmitt-trigger actions  
Inputs accept voltages higher than VCC  
Input levels:  
The 74VHC32-Q100 operates with CMOS input level  
The 74VHCT32-Q100 operates with TTL input level  
ESD protection:  
MIL-STD-883, method 3015 exceeds 2000 V  
HBM JESD22-A114F exceeds 2000 V  
MM JESD22-A115-A exceeds 200 V (C = 200 pf, R = 0 )  
Multiple package options  

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