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74VHCT373MTCX PDF预览

74VHCT373MTCX

更新时间: 2024-11-06 20:40:19
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD 驱动光电二极管逻辑集成电路
页数 文件大小 规格书
10页 158K
描述
Bus Driver, AHCT/VHCT Series, 1-Func, 8-Bit, True Output, CMOS, PDSO20, PLASTIC, TSSOP-20

74VHCT373MTCX 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
零件包装代码:TSSOP包装说明:TSSOP, TSSOP20,.25
针数:20Reach Compliance Code:unknown
HTS代码:8542.39.00.01风险等级:5.3
系列:AHCT/VHCTJESD-30 代码:R-PDSO-G20
JESD-609代码:e0长度:6.5 mm
负载电容(CL):50 pF逻辑集成电路类型:BUS DRIVER
最大I(ol):0.008 A位数:8
功能数量:1端口数量:2
端子数量:20最高工作温度:85 °C
最低工作温度:-40 °C输出特性:3-STATE
输出极性:TRUE封装主体材料:PLASTIC/EPOXY
封装代码:TSSOP封装等效代码:TSSOP20,.25
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
包装方法:TAPE AND REEL峰值回流温度(摄氏度):NOT SPECIFIED
电源:5 VProp。Delay @ Nom-Sup:10.5 ns
传播延迟(tpd):14.5 ns认证状态:Not Qualified
座面最大高度:1.1 mm子类别:FF/Latches
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):4.5 V
标称供电电压 (Vsup):5 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子面层:Tin/Lead (Sn/Pb)端子形式:GULL WING
端子节距:0.65 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:4.4 mm
Base Number Matches:1

74VHCT373MTCX 数据手册

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January 1998  
74VHC373 74VHCT373  
Octal D-Type Latch with 3-STATE Outputs  
General Description  
Features  
n High Speed:  
The VHC/VHCT373 is an advanced high speed CMOS octal  
D-type latch with 3-STATE output fabricated with silicon gate  
CMOS technology. It achieves the high speed operation  
similar to equivalent Bipolar Schottky TTL while maintaining  
the CMOS low power dissipation. This 8-bit D-type latch is  
controlled by a latch enable input (LE) and an output enable  
input (OE). The latches appear transparent to data when  
latch enable (LE) is HIGH. When LE is low, the data that  
meets the setup time is latched. When the OE input is high,  
the eight outputs are in a high impedance state.  
=
=
=
=
@
@
VHC tpd 5.0 ns (typ) VCC 5V  
VHCT tpd 5.1 ns (typ) VCC 5V  
n High Noise Immunity:  
=
=
VHC VNIH VNIL 28% VCC (Min)  
=
=
VHCT VIH 2.0V, VIL 0.8V  
n Power Down Protection:  
VHC Inputs Only  
VHCT Inputs and Outputs  
n Low Noise:  
=
VHC VOLP 0.6V (typ)  
An input protection circuit ensures that 0V–7V can be ap-  
plied to the input pins without regard to the supply voltage.  
This device can be used to interface 5V to 3V systems and  
two supply systems such as battery back up. This circuit pre-  
vents device destruction due to mismatched supply and in-  
put voltages.  
=
VHCT VOLP 0.8V (typ)  
n Low Power Dissipation:  
=
=
@
ICC 4 µA (Max) Ta 25˚C  
n Pin and Function Compatible with 74HC/HCT373  
Ordering Code:  
Commercial  
74VHC373M  
Package Number  
M20B  
Package Description  
20-Lead Molded JEDEC SOIC  
20-Lead Molded EIAJ SOIC  
20-Lead Molded JEDEC Type 1 TSSOP  
20-Lead Molded DIP  
74VHC373SJ  
74VHC373MTC  
74VHC373N  
M20D  
MTC20  
N20A  
74VHCT373M  
74VHCT373SJ  
74VHCT373MTC  
74VHCT373N  
M20B  
20-Lead Molded JEDEC SOIC  
20-Lead Molded EIAJ SOIC  
20-Lead Molded JEDEC Type 1 TSSOP  
20-Lead Molded DIP  
M20D  
MTC20  
N20A  
Surface mount packages are also available on Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.  
Logic Symbol  
Connection Diagram  
IEEE/IEC  
Pin Assignment for  
DIP,TSSOP and SOIC  
DS011555-1  
DS011555-2  
© 1998 Fairchild Semiconductor Corporation  
DS011555  
www.fairchildsemi.com  

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