Datasheet > 74HC138

74HC138

更新时间： 2024-11-05 08:03:39

品牌	Logo	应用领域
安森美 - ONSEMI		解码器解复用器栅
页数	文件大小	规格书
9页	136K
描述
1−of−8 Decoder/ Demultiplexer High−Performance Silicon−Gate CMOS

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74HC138 数据手册

74HC138

1−of−8 Decoder/

Demultiplexer

High−Performance Silicon−Gate CMOS

The 74HC138 is identical in pinout to the LS138. The device inputs

are compatible with standard CMOS outputs; with pullup resistors,

they are compatible with LSTTL outputs.

http://onsemi.com

The HC138 decodes a three−bit Address to one−of−eight active−low

outputs. This device features three Chip Select inputs, two active−low

and one active−high to facilitate the demultiplexing, cascading, and

chip−selecting functions. The demultiplexing function is

accomplished by using the Address inputs to select the desired device

output; one of the Chip Selects is used as a data input while the other

Chip Selects are held in their active states.

MARKING

DIAGRAMS

SOIC−16

D SUFFIX

CASE 751B

HC138G

AWLYWW

Features

• Output Drive Capability: 10 LSTTL Loads

• Outputs Directly Interface to CMOS, NMOS and TTL

• Operating Voltage Range: 2.0 to 6.0 V

TSSOP−16

DT SUFFIX

CASE 948F

138

ALYW G

• Low Input Current: 1.0 mA

• High Noise Immunity Characteristic of CMOS Devices

• In Compliance with the Requirements Defined by JEDEC

Standard No. 7A

• ESD Performance: HBM > 2000 V; Machine Model > 200 V

• Chip Complexity: 100 FETs or 29 Equivalent Gates

• These are Pb−Free Devices

HC138 = Device Code

L, WL

= Assembly Location

= Wafer Lot

= Year

W, WW = Work Week

G or G

= Pb−Free Package

(Note: Microdot may be in either location)

ORDERING INFORMATION

See detailed ordering and shipping information in the package

dimensions section on page 2 of this data sheet.

Semiconductor Components Industries, LLC, 2007

Publication Order Number:

March, 2007 − Rev. 1

74HC138/D

12 3 4 5 6 7...9

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