5秒后页面跳转
74HC138BQ-Q100 PDF预览

74HC138BQ-Q100

更新时间: 2024-09-16 12:36:51
品牌 Logo 应用领域
恩智浦 - NXP 解码器驱动器逻辑集成电路
页数 文件大小 规格书
18页 241K
描述
3-to-8 line decoder/demultiplexer; inverting

74HC138BQ-Q100 技术参数

是否Rohs认证: 符合生命周期:Transferred
零件包装代码:QFN包装说明:2.50 X 3.50 MM, 0.85 MM HEIGHT, PLASTIC, MO-241, SOT763-1, DHVQFN-16
针数:16Reach Compliance Code:unknown
风险等级:5.58系列:HC/UH
输入调节:STANDARDJESD-30 代码:R-PQCC-N16
长度:3.5 mm逻辑集成电路类型:OTHER DECODER/DRIVER
湿度敏感等级:1功能数量:1
端子数量:16最高工作温度:125 °C
最低工作温度:-40 °C输出极性:INVERTED
封装主体材料:PLASTIC/EPOXY封装代码:HVQCCN
封装形状:RECTANGULAR封装形式:CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE
峰值回流温度(摄氏度):260传播延迟(tpd):225 ns
筛选级别:AEC-Q100座面最大高度:1 mm
最大供电电压 (Vsup):6 V最小供电电压 (Vsup):2 V
标称供电电压 (Vsup):5 V表面贴装:YES
技术:CMOS温度等级:AUTOMOTIVE
端子形式:NO LEAD端子节距:0.5 mm
端子位置:QUAD处于峰值回流温度下的最长时间:30
宽度:2.5 mmBase Number Matches:1

74HC138BQ-Q100 数据手册

 浏览型号74HC138BQ-Q100的Datasheet PDF文件第2页浏览型号74HC138BQ-Q100的Datasheet PDF文件第3页浏览型号74HC138BQ-Q100的Datasheet PDF文件第4页浏览型号74HC138BQ-Q100的Datasheet PDF文件第5页浏览型号74HC138BQ-Q100的Datasheet PDF文件第6页浏览型号74HC138BQ-Q100的Datasheet PDF文件第7页 
74HC138-Q100; 74HCT138-Q100  
3-to-8 line decoder/demultiplexer; inverting  
Rev. 1 — 16 July 2012  
Product data sheet  
1. General description  
The 74HC138-Q100; 74HCT138-Q100 is a high-speed Si-gate CMOS device and is pin  
compatible with Low-power Schottky TTL (LSTTL).  
The 74HC138-Q100; 74HCT138-Q100 decoder accepts three binary weighted address  
inputs (A0, A1 and A3) and when enabled, provides 8 mutually exclusive active LOW  
outputs (Y0 to Y7).  
The 74HC138-Q100; 74HCT138-Q100 features three enable inputs: two active LOW  
(E1 and E2) and one active HIGH (E3). Every output will be HIGH unless E1 and E2 are  
LOW and E3 is HIGH.  
This multiple enable function allows easy parallel expansion of the 74HC138-Q100;  
74HCT138-Q100 to a 1-of-32 (5 lines to 32 lines) decoder with just four 74HC138-Q100;  
74HCT138-Q100 ICs and one inverter.  
The 74HC138-Q100; 74HCT138-Q100 can be used as an eight output demultiplexer by  
using one of the active LOW enable inputs as the data input and the remaining enable  
inputs as strobes. Not used enable inputs must be permanently tied to their appropriate  
active HIGH- or LOW-state.  
This product has been qualified to the Automotive Electronics Council (AEC) standard  
Q100 (Grade 1) and is suitable for use in automotive applications.  
2. Features and benefits  
Automotive product qualification in accordance with AEC-Q100 (Grade 1)  
Specified from 40 C to +85 C and from 40 C to +125 C  
Demultiplexing capability  
Multiple input enable for easy expansion  
Complies with JEDEC standard no. 7A  
Ideal for memory chip select decoding  
Active LOW mutually exclusive outputs  
ESD protection:  
MIL-STD-883, method 3015 exceeds 2000 V  
HBM JESD22-A114F exceeds 2000 V  
MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0 )  
Multiple package options  

与74HC138BQ-Q100相关器件

型号 品牌 获取价格 描述 数据表
74HC138BQ-Q100,115 NXP

获取价格

74HC(T)138-Q100 - 3-to-8 line decoder/demultiplexer; inverting QFN 16-Pin
74HC138D NXP

获取价格

3-to-8 line decoder/demultiplexer; inverting
74HC138D NEXPERIA

获取价格

3-to-8 line decoder/demultiplexer; invertingProduction
74HC138D TOSHIBA

获取价格

3-to-8 Line Decoder, SOIC16
74HC138D,652 NXP

获取价格

74HC(T)138 - 3-to-8 line decoder/demultiplexer; inverting SOP 16-Pin
74HC138D,653 NXP

获取价格

74HC(T)138 - 3-to-8 line decoder/demultiplexer; inverting SOP 16-Pin
74HC138DB NXP

获取价格

3-to-8 line decoder/demultiplexer; inverting
74HC138D-Q100 NEXPERIA

获取价格

3-to-8 line decoder/demultiplexer; invertingProduction
74HC138D-Q100 NXP

获取价格

3-to-8 line decoder/demultiplexer; inverting
74HC138DR2G ONSEMI

获取价格

1−of−8 Decoder/ Demultiplexer High−Performance Silicon−Gate CMOS