生命周期: | Active | Reach Compliance Code: | unknown |
风险等级: | 5.38 | 系列: | GTL/TVC |
JESD-30 代码: | R-PDSO-G56 | 长度: | 18.425 mm |
逻辑集成电路类型: | REGISTERED BUS TRANSCEIVER | 位数: | 18 |
功能数量: | 1 | 端口数量: | 2 |
端子数量: | 56 | 最高工作温度: | 85 °C |
最低工作温度: | -40 °C | 输出特性: | OPEN-COLLECTOR/3-STATE |
输出极性: | TRUE | 封装主体材料: | PLASTIC/EPOXY |
封装代码: | SSOP | 封装形状: | RECTANGULAR |
封装形式: | SMALL OUTLINE, SHRINK PITCH | 传播延迟(tpd): | 3.8 ns |
认证状态: | Not Qualified | 座面最大高度: | 2.8 mm |
最大供电电压 (Vsup): | 3.45 V | 最小供电电压 (Vsup): | 3.15 V |
标称供电电压 (Vsup): | 3.3 V | 表面贴装: | YES |
技术: | BICMOS | 温度等级: | INDUSTRIAL |
端子形式: | GULL WING | 端子节距: | 0.635 mm |
端子位置: | DUAL | 宽度: | 7.5 mm |
Base Number Matches: | 1 |
型号 | 品牌 | 获取价格 | 描述 | 数据表 |
74GTL16923DGGRE4 | TI |
获取价格 |
18-BIT LVTTL-TO-GTL/GTL+ BUS TRANSCEIVER | |
74GTL16923DGGRG4 | TI |
获取价格 |
GTL/TVC SERIES, DUAL 9-BIT REGISTERED TRANSCEIVER, TRUE OUTPUT, PDSO64, GREEN, PLASTIC, TS | |
74GTL2005 | SGMICRO |
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Quad GTL/GTL+ to LVTTL/TTL Bidirectional Non-Latched Translator | |
74GTLP1395DGVRE4 | TI |
获取价格 |
TWO 1-BIT LVTTL-TO-GTLP ADJUSTABLE-EDGE-RATE BUS TRANSCEIVERS WITH SPLIT LVTTL PORT, FEEDB | |
74GTLP1395DGVRG4 | TI |
获取价格 |
Two 1-Bit LVTTL/GTLP Adj-Edge-Rate Bus Xcvrs w Split LVTTL Port, Fdbk Path and Selectable | |
74GTLP2033DGGRE4 | TI |
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8-BIT LVTTL-TO-GTLP ADJUSTABLE-EDGE-RATE REGISTERED TRANSCEIVER WITH SPLIT LVTTL PORT AND | |
74GTLP2033DGGRG4 | TI |
获取价格 |
GTLP SERIES, 8-BIT REGISTERED TRANSCEIVER, INVERTED OUTPUT, PDSO48, GREEN, PLASTIC, TSSOP- | |
74GTLP2033DGVRE4 | TI |
获取价格 |
8-BIT LVTTL-TO-GTLP ADJUSTABLE-EDGE-RATE REGISTERED TRANSCEIVER WITH SPLIT LVTTL PORT AND | |
74GTLP2033DGVRG4 | TI |
获取价格 |
IC GTLP SERIES, 8-BIT REGISTERED TRANSCEIVER, INVERTED OUTPUT, PDSO48, GREEN, PLASTIC, TVS | |
74GTLP2034DGGRE4 | TI |
获取价格 |
8-BIT LVTTL-TO-GTLP ADJUSTABLE-EDGE-RATE REGISTERED TRANSCEIVER WITH SPLIT LVTTL PORT AND |