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74F113SC PDF预览

74F113SC

更新时间: 2024-11-04 22:45:55
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD 触发器锁存器逻辑集成电路光电二极管
页数 文件大小 规格书
6页 63K
描述
Dual JK Negative Edge-Triggered Flip-Flop

74F113SC 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
零件包装代码:SOIC包装说明:SOP, SOP14,.25
针数:14Reach Compliance Code:unknown
HTS代码:8542.39.00.01风险等级:5.76
系列:F/FASTJESD-30 代码:R-PDSO-G14
JESD-609代码:e0长度:8.65 mm
逻辑集成电路类型:J-K FLIP-FLOP最大频率@ Nom-Sup:80000000 Hz
最大I(ol):0.02 A位数:2
功能数量:2端子数量:14
最高工作温度:70 °C最低工作温度:
输出极性:COMPLEMENTARY封装主体材料:PLASTIC/EPOXY
封装代码:SOP封装等效代码:SOP14,.25
封装形状:RECTANGULAR封装形式:SMALL OUTLINE
峰值回流温度(摄氏度):NOT SPECIFIED电源:5 V
最大电源电流(ICC):19 mA传播延迟(tpd):7 ns
认证状态:Not Qualified座面最大高度:1.75 mm
子类别:FF/Latches最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):4.5 V标称供电电压 (Vsup):5 V
表面贴装:YES技术:TTL
温度等级:COMMERCIAL端子面层:Tin/Lead (Sn/Pb)
端子形式:GULL WING端子节距:1.27 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
触发器类型:NEGATIVE EDGE宽度:3.9 mm
最小 fmax:80 MHzBase Number Matches:1

74F113SC 数据手册

 浏览型号74F113SC的Datasheet PDF文件第2页浏览型号74F113SC的Datasheet PDF文件第3页浏览型号74F113SC的Datasheet PDF文件第4页浏览型号74F113SC的Datasheet PDF文件第5页浏览型号74F113SC的Datasheet PDF文件第6页 
April 1988  
Revised July 1999  
74F113  
Dual JK Negative Edge-Triggered Flip-Flop  
transferred to the outputs on the falling edge of the clock  
pulse.  
General Description  
The 74F113 offers individual J, K, Set and Clock inputs.  
When the clock goes HIGH the inputs are enabled and  
data may be entered. The logic level of the J and K inputs  
may be changed when the clock pulse is HIGH and the flip-  
flop will perform according to the Truth Table as long as  
minimum setup and hold times are observed. Input data is  
Asynchronous input:  
LOW input to SD sets Q to HIGH level  
Set is independent of clock  
Ordering Code:  
Order Number Package Number  
Package Description  
74F113SC  
74F113SJ  
74F113PC  
M14A  
M14D  
N14A  
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150 Narrow  
14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide  
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide  
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.  
Logic Symbols  
Connection Diagram  
IEEE/IEC  
© 1999 Fairchild Semiconductor Corporation  
DS009473  
www.fairchildsemi.com  

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