是否Rohs认证: | 不符合 | 生命周期: | Obsolete |
零件包装代码: | DIP | 包装说明: | CERAMIC, DIP-14 |
针数: | 14 | Reach Compliance Code: | unknown |
HTS代码: | 8542.39.00.01 | 风险等级: | 5.76 |
Is Samacsys: | N | 其他特性: | WITH INDIVIDUAL SET INPUTS |
系列: | F/FAST | JESD-30 代码: | R-GDIP-T14 |
JESD-609代码: | e0 | 长度: | 19.43 mm |
逻辑集成电路类型: | J-K FLIP-FLOP | 位数: | 2 |
功能数量: | 1 | 端子数量: | 14 |
最高工作温度: | 70 °C | 最低工作温度: | |
输出极性: | COMPLEMENTARY | 封装主体材料: | CERAMIC, GLASS-SEALED |
封装代码: | DIP | 封装等效代码: | DIP14,.3 |
封装形状: | RECTANGULAR | 封装形式: | IN-LINE |
峰值回流温度(摄氏度): | NOT SPECIFIED | 电源: | 5 V |
传播延迟(tpd): | 8.5 ns | 认证状态: | Not Qualified |
座面最大高度: | 5.08 mm | 子类别: | FF/Latches |
最大供电电压 (Vsup): | 5.25 V | 最小供电电压 (Vsup): | 4.75 V |
标称供电电压 (Vsup): | 5 V | 表面贴装: | NO |
技术: | TTL | 温度等级: | COMMERCIAL |
端子面层: | Tin/Lead (Sn/Pb) | 端子形式: | THROUGH-HOLE |
端子节距: | 2.54 mm | 端子位置: | DUAL |
处于峰值回流温度下的最长时间: | NOT SPECIFIED | 触发器类型: | NEGATIVE EDGE |
宽度: | 7.62 mm | 最小 fmax: | 125 MHz |
Base Number Matches: | 1 |
型号 | 品牌 | 获取价格 | 描述 | 数据表 |
74F114DCQM | FAIRCHILD |
获取价格 |
J-K Flip-Flop, 2-Func, Negative Edge Triggered, TTL, CDIP14, | |
74F114DCQM | ROCHESTER |
获取价格 |
J-K Flip-Flop | |
74F114DCQR | FAIRCHILD |
获取价格 |
J-K Flip-Flop, F/FAST Series, 1-Func, Negative Edge Triggered, 2-Bit, Complementary Output | |
74F114D-T | YAGEO |
获取价格 |
J-K Flip-Flop, F/FAST Series, 1-Func, Negative Edge Triggered, 2-Bit, Complementary Output | |
74F114L1C | FAIRCHILD |
获取价格 |
J-K Flip-Flop, F/FAST Series, 1-Func, Negative Edge Triggered, 2-Bit, Complementary Output | |
74F114L1CQR | FAIRCHILD |
获取价格 |
J-K Flip-Flop, F/FAST Series, 1-Func, Negative Edge Triggered, 2-Bit, Complementary Output | |
74F114PC | FAIRCHILD |
获取价格 |
Dual JK Negative Edge-Triggered Flip-Flop with Common Clocks and Clears | |
74F114PCQM | FAIRCHILD |
获取价格 |
J-K Flip-Flop, 2-Func, Negative Edge Triggered, TTL, PDIP14, | |
74F114PCQM | ROCHESTER |
获取价格 |
J-K Flip-Flop | |
74F114PCQR | ROCHESTER |
获取价格 |
J-K Flip-Flop, F/FAST Series, 1-Func, Negative Edge Triggered, 2-Bit, Complementary Output |