Datasheet > WED2ZL64512S

WED2ZL64512S

更新时间： 2024-02-09 13:39:00

品牌	Logo	应用领域
WEDC		静态存储器
页数	文件大小	规格书
9页	471K
描述
512K x 64 Synchronous Pipeline NBL SRAM

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WED2ZL64512S 数据手册

WED2ZL64512S

White Electronic Designs

512K x 64 Synchronous Pipeline NBL SRAM

FEATURES

DESCRIPTION

 Fast clock speed: 166, 150, 133, and 100MHz

The WEDC SyncBurst - SRAM family employs high-

speed, low-power CMOS designs that are fabricated

using an advanced CMOS process. WEDC’s 32Mb Sync

SRAM integrate two 512K x 32 SRAMs into a single

BGA package to provide 512K x 64 conﬁguration. All

synchronous inputs pass through registers controlled by

a positive-edge-triggered single-clock input (CK). The

NBLor No Bus Latency Memory utilizes all the bandwidth

in any combination of operating cycles. Address, data

inputs, and all control signals except output enable are

synchronized to input clock. Output Enable controls the

outputs at any given time and to Asynchronous Input.

Write cycles are internally self-timed and initiated by the

rising edge of the clock input. This feature eliminates

complex off-chip write pulse generation and provides

increased timing ﬂexibility for incoming signals.

 Fast access times: 3.5ns, 3.8ns, 4.2ns, and 5.0ns

 Fast OE# access times: 3.5ns, 3.8ns, 4.2ns, and

5.0ns

 Seperate +2.5V ± 5% power supplys for core I/O

(V_CC+ V_CCQ

)

 Double Word Write Control

 Clock-controlled and registered addresses, data I/Os

and control signals

 Packaging:

• 119 bump BGA package

 Low capacitive bus loading

NOTE: NBL = No Bus Latency is equivalent to the industry ZBT™ devices.

FIG. 1 PIN CONFIGURATION

(TOP VIEW)

BLOCK DIAGRAM

–

DQ_FDQ_FDQ_FDQ_FNC DQ_GDQ_GDQ_GDQ_G

DQ_EDQ_EDQ_EDQ_ENC DQ_HDQ_HDQ_HDQ_H

DQ 32

A0 – A18

OE#

WE#

WEB_LW

CS2B

NC V_CCQV_CCQV_CCQNC

DQ 0 – 31

CS1B

SA V_CCQV_CC

V_CC

V_SS

V_CC

V_SS

V_CC

V_SS

V_CCV_CCQSA

CE# V_SS

V_SS

512K x 36

V_SSWE₁# V_SS

SA₁₈CE₂# SS_CKOE# NC

SA₁SA₀

A0 – A18

CE₂V_SSWE₀# V_SS

V_SS

V_CC

OE#

WE#

WEB_HW

V_SS

V_CC

V_SS

V_CC

SA V_CCQV_CC

NC NC

V_CCV_CCQSA

NC NC

DQ 0 – 31

NC V_CCQV_CCQV_CCQNC

DQ_DDQ_DDQ_DDQ_DNC DQ_ADQ_ADQ_ADQ_A

DQ_CDQ_CDQ_CDQ_CNC DQ_BDQ_BDQ_BDQ_B

512K x 36

White Electronic Designs Corp. reserves the right to change products or speciﬁcations without notice.

October 2001

Rev. 0

White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com

12 3 4 5 6 7...9

中文翻译

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与WED2ZL64512S相关器件

型号	品牌	获取价格	描述	数据表
WED2ZL64512S35BC	WEDC	获取价格	512K x 64 Synchronous Pipeline NBL SRAM
WED2ZL64512S38BC	WEDC	获取价格	512K x 64 Synchronous Pipeline NBL SRAM
WED2ZL64512S42BC	WEDC	获取价格	512K x 64 Synchronous Pipeline NBL SRAM
WED2ZL64512S50BC	WEDC	获取价格	512K x 64 Synchronous Pipeline NBL SRAM
WED2ZL64512S-BC	ETC	获取价格	NBL SSRAM MCP
WED2ZLRSP01S	WEDC	获取价格	512K x 32/256K x 32 Dual Array Synchronous Pipeline Burst NBL SRAM
WED2ZLRSP01S35BC	WEDC	获取价格	512K x 32/256K x 32 Dual Array Synchronous Pipeline Burst NBL SRAM
WED2ZLRSP01S38BC	WEDC	获取价格	512K x 32/256K x 32 Dual Array Synchronous Pipeline Burst NBL SRAM
WED2ZLRSP01S38BI	WEDC	获取价格	512K x 32/256K x 32 Dual Array Synchronous Pipeline Burst NBL SRAM
WED2ZLRSP01S42BC	WEDC	获取价格	512K x 32/256K x 32 Dual Array Synchronous Pipeline Burst NBL SRAM

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