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UPA2450BTL-A PDF预览

UPA2450BTL-A

更新时间: 2024-11-09 21:17:31
品牌 Logo 应用领域
瑞萨 - RENESAS /
页数 文件大小 规格书
8页 140K
描述
TRANSISTOR,MOSFET,COMMON DRAIN,N-CHANNEL,20V V(BR)DSS,8.6A I(D),LLCC

UPA2450BTL-A 技术参数

是否Rohs认证: 符合生命周期:Obsolete
Reach Compliance Code:compliant风险等级:5.84
最大漏极电流 (Abs) (ID):8.6 AFET 技术:METAL-OXIDE SEMICONDUCTOR
工作模式:ENHANCEMENT MODE最高工作温度:150 °C
极性/信道类型:N-CHANNEL最大功率耗散 (Abs):2.5 W
子类别:FET General Purpose Power表面贴装:YES
Base Number Matches:1

UPA2450BTL-A 数据手册

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DATA SHEET  
MOS FIELD EµFFEPCTATR2A4NS5IS0TOBR  
N-CHANNEL MOS FIELD EFFECT TRANSISTOR  
FOR SWITCHING  
PACKAGE DRAWING (Unit: mm)  
DESCRIPTION  
The µ PA2450B is a switching device, which can be driven  
directly by a 2.5 V power source.  
1
2
3
6
5
4
The µ PA2450B features a low on-state resistance and  
excellent switching characteristics, and is suitable for  
applications such as power switch of portable machine and  
so on.  
4.4±0.1  
5.0±0.1  
FEATURES  
2.5 V drive available  
Low on-state resistance  
RDS(on)1 = 17.5 mMAX. (VGS = 4.5 V, ID = 4.0 A)  
RDS(on)2 = 18.5 mMAX. (VGS = 4.0 V, ID = 4.0 A)  
RDS(on)3 = 22.0 mMAX. (VGS = 3.1 V, ID = 4.0 A)  
RDS(on)4 = 27.5 mMAX. (VGS = 2.5 V, ID = 4.0 A)  
Built-in G-S protection diode against ESD  
7
(0.15)  
(0.9)  
ORDERING INFORMATION  
PART NUMBER  
PACKAGE  
(0.5)  
(2.2)  
Each lead has same dimensions.  
µ PA2450BTL  
6PIN HWSON (4521)  
1,2: Source 1  
3: Gate 1  
7: Drain  
5,6: Source 2  
4: Gate 2  
ABSOLUTE MAXIMUM RATINGS (TA = 25°C)  
Drain to Source Voltage (VGS = 0 V)  
Gate to Source Voltage (VDS = 0 V)  
Drain Current (DC) Note1  
VDSS  
VGSS  
ID(DC)  
ID(pulse)  
PT1  
PT2  
Tch  
Tstg  
20.0  
12.0  
8.6  
80.0  
2.5  
V
V
A
EQUIVALENT CIRCUIT  
Drain1  
Drain2  
Drain Current (pulse) Note2  
A
Body  
Body  
Diode  
Total Power Dissipation (2 units) Note1  
Total Power Dissipation (2 units) Note3  
Channel Temperature  
W
W
°C  
°C  
Diode  
Gate1  
Gate2  
Gate  
0.7  
150  
55 to +150  
Gate  
Protection  
Diode  
Protection  
Diode  
Source1  
Source2  
Storage Temperature  
Notes 1. Mounted on ceramic board of 50 cm2 x 1.1 mm  
2. PW 10 µs, Duty Cycle 1%  
3. Mounted on FR-4 board of 50 cm2 x 1.1 mm  
Remark The diode connected between the gate and source of the transistor serves as a protector against ESD.  
When this device actually used, an additional protection circuit is externally required if a voltage exceeding  
the rated voltage may be applied to this device.  
The information in this document is subject to change without notice. Before using this document, please  
confirm that this is the latest version.  
Not all products and/or types are available in every country. Please check with an NEC Electronics  
sales representative for availability and additional information.  
Document No. G16635EJ1V0DS00 (1st edition)  
Date Published January 2004 NS CP(K)  
Printed in Japan  
2004  

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