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UPA2452TL PDF预览

UPA2452TL

更新时间： 2024-11-19 22:41:43
品牌 Logo 应用领域
日电电子 - NEC 晶体开关小信号场效应晶体管光电二极管
页数 文件大小 规格书
8页 152K
描述
N-CHANNEL MOS FIELD EFFECT TRANSISTOR FOR SWITCHING

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中文翻译

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UPA2452TL 技术参数

是否Rohs认证：不符合生命周期：Transferred
包装说明：SMALL OUTLINE, R-PDSO-F6针数：6
Reach Compliance Code：compliantECCN代码：EAR99
风险等级：5.2Is Samacsys：N
外壳连接：DRAIN配置：COMMON DRAIN, 2 ELEMENTS WITH BUILT-IN DIODE
最小漏源击穿电压：24 V最大漏极电流 (ID)：7.8 A
最大漏源导通电阻：0.03 ΩFET 技术：METAL-OXIDE SEMICONDUCTOR
JESD-30 代码：R-PDSO-F6JESD-609代码：e0
元件数量：2端子数量：6
工作模式：ENHANCEMENT MODE封装主体材料：PLASTIC/EPOXY
封装形状：RECTANGULAR封装形式：SMALL OUTLINE
峰值回流温度（摄氏度）：NOT SPECIFIED极性/信道类型：N-CHANNEL
认证状态：Not Qualified表面贴装：YES
端子面层：TIN LEAD端子形式：FLAT
端子位置：DUAL处于峰值回流温度下的最长时间：NOT SPECIFIED
晶体管应用：SWITCHING晶体管元件材料：SILICON
Base Number Matches：1

UPA2452TL 数据手册

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DATA SHEET  
MOS FIELD EFFECT TRANSISTOR  
µ PA2452  
N-CHANNEL MOS FIELD EFFECT TRANSISTOR  
FOR SWITCHING  
PACKAGE DRAWING (Unit: mm)  
DESCRIPTION  
The µ PA2452 is a switching device which can be driven  
directly by a 2.5 V power source.  
1
2
3
6
5
4
This µ PA2452 features a low on-state resistance and  
excellent switching characteristics, and is suitable for  
applications such as power switch of portable machine and  
so on.  
4.4±±.1  
5.±±±.1  
FEATURES  
• 2.5 V drive available  
• Low on-state resistance  
7
RDS(on)1 = 17.5 mΩ TYP. (VGS = 4.5 V, ID = 4.0 A)  
RDS(on)2 = 18.5 mΩ TYP. (VGS = 4.0 V, ID = 4.0 A)  
RDS(on)3 = 21.0 mΩ TYP. (VGS = 3.1 V, ID = 4.0 A)  
RDS(on)4 = 25.0 mΩ TYP. (VGS = 2.5 V, ID = 4.0 A)  
• Built-in G-S protection diode against ESD  
(±.9)  
(±.15)  
ORDERING INFORMATION  
(3.±5)  
(±.5±)  
Each lead has same dimensions  
PART NUMBER  
PACKAGE  
1,2: Source 1  
3: Gate 1  
7: Drain  
5,6: Source 2  
4: Gate 2  
µ PA2452TL  
6PIN HWSON (4521)  
ABSOLUTE MAXIMUM RATINGS (TA = 25°C)  
Drain to Source Voltage (VGS = 0 V)  
Gate to Source Voltage (VDS = 0 V)  
Drain Current (DC) Note1  
VDSS  
VGSS  
ID(DC)  
ID(pulse)  
PT1  
PT2  
Tch  
Tstg  
24.0  
12.0  
7.8  
80.0  
2.5  
0.7  
V
V
A
EQUIVALENT CIRCUIT  
Drain1  
Drain2  
Drain Current (pulse) Note2  
A
Body  
Body  
Diode  
Total Power Dissipation (2 units) Note1  
Total Power Dissipation (2 units) Note3  
Channel Temperature  
W
W
°C  
°C  
Diode  
Gate1  
Gate2  
Gate  
Gate  
Protection  
Diode  
Protection  
Diode  
Source1  
Source2  
150  
−55 to +150  
Storage Temperature  
Notes 1. Mounted on ceramic substrate of 50 cm2 x 1.1 mm  
2. PW ≤ 10 µs, Duty Cycle ≤ 1%  
3. Mounted on FR-4 board of 50 cm2 x 1.6 mm  
Remark The diode connected between the gate and source of the transistor serves as a protector against ESD.  
When this device actually used, an additional protection circuit is externally required if a voltage exceeding  
the rated voltage may be applied to this device.  
The information in this document is subject to change without notice. Before using this document, please  
confirm that this is the latest version.  
Not all products and/or types are available in every country. Please check with an NEC Electronics  
sales representative for availability and additional information.  
Document No. G16272EJ1V0DS00 (1st edition)  
Date Published October 2003 NS CP(K)  
Printed in Japan  
2003  
12345678

中文翻译

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