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UPA2352T1P-E4-A

更新时间： 2024-09-15 21:18:39
品牌 Logo 应用领域
日电电子 - NEC 开关晶体管
页数 文件大小 规格书
9页 284K
描述
Small Signal Field-Effect Transistor, 2-Element, N-Channel, Silicon, Metal-oxide Semiconductor FET, LEAD FREE PACKAGE-4

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UPA2352T1P-E4-A 技术参数

生命周期：Obsolete包装说明：LEAD FREE PACKAGE-4
Reach Compliance Code：unknown风险等级：5.7
配置：COMMON DRAIN, 2 ELEMENTS WITH BUILT-IN DIODEFET 技术：METAL-OXIDE SEMICONDUCTOR
JESD-30 代码：S-PBGA-B4元件数量：2
端子数量：4工作模式：ENHANCEMENT MODE
封装主体材料：PLASTIC/EPOXY封装形状：SQUARE
封装形式：GRID ARRAY极性/信道类型：N-CHANNEL
认证状态：Not Qualified表面贴装：YES
端子形式：BALL端子位置：BOTTOM
晶体管应用：SWITCHING晶体管元件材料：SILICON
Base Number Matches：1

UPA2352T1P-E4-A 数据手册

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DATA SHEET  
MOS FIELD EFFECT TRANSISTOR  
μPA2352T1P  
DUAL Nch MOSFET  
DESCRIPTION  
OUTLINE DRAWING (Unit: mm)  
The μPA2352T1P is a Dual N-channel MOSFET designed for  
Lithium-Ion battery protection circuit.  
TOP VIEW  
1.40 0.05  
BOTTOM VIEW  
0.65  
Ecologically Flip chip MOSFET for Lithium-Ion battery Protection  
(EFLIP).  
FEATURES  
G2  
G1  
S2  
S1  
•
Monolithic Dual MOSFET  
0.65  
Connecting the Drains on the circuit board is not required  
because the Drains of the FET1 and the FET2 are internally  
connected.  
•
2.5 V drive available and low on-state resistance  
RSS(on)1 = 43.0 mΩ MAX. (VGS = 4.5 V, IS = 2.0 A)  
RSS(on)2 = 45.0 mΩ MAX. (VGS = 4.0 V, IS = 2.0 A)  
RSS(on)3 = 55.0 mΩ MAX. (VGS = 3.1 V, IS = 2.0 A)  
RSS(on)4 = 67.0 mΩ MAX. (VGS = 2.5 V, IS = 2.0 A)  
Built-in G-S protection diode against ESD  
Pb-free bump  
Dot area (For in-house)  
0.2 0.05  
1-pin index mark S1  
φ
4 - 0.3  
S1 : Source1  
G1 : Gate1  
G2 : Gate2  
S2 : Source2  
•
•
ORDERING INFORMATION  
PART NUMBER  
PACKAGE  
μ PA2352T1P-E4-A Note  
4-pin EFLIP-LGA  
EQUIVALENT CIRCUIT  
Note Pb-free (This product does not contain Pb in external electrode and other parts.)  
FET2  
FET1  
Remark "-E4" indicates the unit orientation (-E4 only).  
Gate2  
Gate1  
Gate  
Protection  
Diode  
ABSOLUTE MAXIMUM RATINGS (TA = 25°C)  
Source to Source Voltage (VGS = 0 V)  
Gate to Source Voltage (VSS = 0 V)  
Source Current (DC) Note1  
Source Current (pulse) Note2  
Total Power Dissipation (2 units) Note1  
Channel Temperature  
VSSS  
VGSS  
IS(DC)  
IS(pulse)  
PT  
24  
12  
V
V
4.0  
A
Source2  
Source1  
40  
A
Body Diode  
0.75  
W
°C  
°C  
Tch  
150  
Storage Temperature  
Tstg  
−55 to +150  
Notes 1. Mounted on BT resin board of 40.5 mm x 25 mm x 1.5 mm  
2. PW ≤ 100 μs, Duty Cycle ≤ 1%  
Remark The diode connected between the gate and source of the transistor serves as a protector against ESD. When this  
device actually used, an additional protection circuit is externally required if a voltage exceeding the rated voltage  
may be applied to this device.  
The information in this document is subject to change without notice. Before using this document, please  
confirm that this is the latest version.  
Not all products and/or types are available in every country. Please check with an NEC Electronics  
sales representative for availability and additional information.  
Document No. G19741EJ1V0DS00 (1st edition)  
Date Published April 2009 NS  
Printed in Japan  
2009  
1234567...9

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