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TE28F400CE-B120 PDF预览

TE28F400CE-B120

更新时间: 2024-11-13 19:51:31
品牌 Logo 应用领域
英特尔 - INTEL 可编程只读存储器光电二极管内存集成电路
页数 文件大小 规格书
57页 648K
描述
512KX8 FLASH 5V PROM, 120ns, PDSO48, 12 X 20 MM, TSOP-48

TE28F400CE-B120 技术参数

生命周期:Obsolete零件包装代码:TSOP
包装说明:TSOP1,针数:48
Reach Compliance Code:unknown风险等级:5.82
最长访问时间:120 ns其他特性:CAN BE OPERATED IN 4.5V TO 5.5V; CAN BE CONFG AS 256K X 16; BOTTOM BOOT BLOCK
JESD-30 代码:R-PDSO-G48长度:18.4 mm
内存密度:4194304 bit内存集成电路类型:FLASH
内存宽度:8功能数量:1
端子数量:48字数:524288 words
字数代码:512000工作模式:ASYNCHRONOUS
最高工作温度:85 °C最低工作温度:-40 °C
组织:512KX8输出特性:3-STATE
封装主体材料:PLASTIC/EPOXY封装代码:TSOP1
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, THIN PROFILE
并行/串行:PARALLEL编程电压:5 V
认证状态:Not Qualified座面最大高度:1.2 mm
最大供电电压 (Vsup):3.6 V最小供电电压 (Vsup):2.7 V
标称供电电压 (Vsup):3 V表面贴装:YES
技术:MOS温度等级:INDUSTRIAL
端子形式:GULL WING端子节距:0.5 mm
端子位置:DUAL宽度:12 mm
Base Number Matches:1

TE28F400CE-B120 数据手册

 浏览型号TE28F400CE-B120的Datasheet PDF文件第2页浏览型号TE28F400CE-B120的Datasheet PDF文件第3页浏览型号TE28F400CE-B120的Datasheet PDF文件第4页浏览型号TE28F400CE-B120的Datasheet PDF文件第5页浏览型号TE28F400CE-B120的Datasheet PDF文件第6页浏览型号TE28F400CE-B120的Datasheet PDF文件第7页 
PRELIMINARY  
E
4-MBIT (256K X 16, 512K X 8)  
SmartVoltage BOOT BLOCK FLASH  
MEMORY FAMILY  
28F400BV-T/B, 28F400CV-T/B, 28F004BV-T/B  
28F400CE-T/B, 28F004BE-T/B  
Intel SmartVoltage Technology  
5V or 12V Program/Erase  
Extended Temperature Operation  
–40°C to +85°C  
2.7V, 3.3V or 5V Read Operation  
Increased Programming Throughput  
at 12V VPP  
Extended Cycling Capability  
100,000 Block Erase Cycles  
(Commercial Temperature)  
10,000 Block Erase Cycles  
(Extended Temperature)  
Very High-Performance Read  
5V: 60/80/120 ns Max. Access Time,  
30/40 ns Max. Output Enable Time  
3V: 110/150/180 ns Max Access  
65/90 ns Max. Output Enable Time  
2.7V: 120 ns Max Access 65 ns Max.  
Output Enable Time  
Automated Word/Byte Program and  
Block Erase  
Industry-Standard Command User  
Interface  
Status Registers  
Low Power Consumption  
Max 60 mA Read Current at 5V  
Max 30 mA Read Current at  
2.7V–3.6V  
Erase Suspend Capability  
SRAM-Compatible Write Interface  
Automatic Power Savings Feature  
1 mA Typical ICC Active Current in  
Static Operation  
x8/x16-Selectable Input/Output Bus  
28F400 for High Performance 16- or  
32-bit CPUs  
Reset/Deep Power-Down Input  
0.2 µA ICCTypical  
x8-Only Input/Output Architecture  
28F004B for Space-Constrained  
8-bit Applications  
Provides Reset for Boot Operations  
Hardware Data Protection Feature  
Write Lockout during Power  
Transitions  
Optimized Array Blocking Architecture  
One 16-KB Protected Boot Block  
Two 8-KB Parameter Blocks  
One 96-KB Main Block  
Industry-Standard Surface Mount  
Packaging  
40-Lead TSOP  
44-Lead PSOP: JEDEC ROM  
Compatible  
48-Lead TSOP  
56-Lead TSOP  
Three 128-KB Main Blocks  
Top or Bottom Boot Locations  
Absolute Hardware-Protection for Boot  
Block  
Software EEPROM Emulation with  
Parameter Blocks  
Footprint Upgradeable from 2-Mbit and  
to 8-Mbit Boot Block Flash Memories  
ETOX™ IV Flash Technology  
July 1997  
Order Number: 290530-005  

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