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STP4925A PDF预览

STP4925A

更新时间: 2024-11-07 17:15:15
品牌 Logo 应用领域
友台半导体 - UMW /
页数 文件大小 规格书
6页 562K
描述
种类:P+P-Channel;漏源电压(Vdss):-30V;持续漏极电流(Id)(在25°C时):-7.2A;Vgs(th)(V):±20;漏源导通电阻:25mΩ@-10V

STP4925A 数据手册

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R
STP4925A  
UMW  
DESCRIPTION  
STP4925 is the dual P-Channel logic enhancement  
mode power field effect transistor are produced  
using high cell density, DMOS trench technology.  
This high density process is especially tailored to  
minimize on-state resistance. These devices are  
particularly suited for low voltage application,  
notebook computer power management,and other  
battery powered circuits where high-side switching  
FEATURES  
l
VDS (V) = -30V  
25m  
32m  
(VGS = 10V)  
(VGS = 4.5V)  
RDS(ON)  
l
l
RDS(ON)  
S2  
G2  
S1  
G1  
D2  
D2  
D1  
D1  
1
2
3
4
8
7
6
5
SOP-8  
ABSOULTE MAXIMUM RATINGS (Ta = 25 Unless otherwise noted )  
Typical  
Parameter  
Symbol  
Unit  
Drain -Source Voltage  
VDSS  
VGSS  
ID  
-30  
V
V
±
20  
Gate -Source Voltage  
T
A
=25 ℃  
Continuous Drain Current  
-7.2  
-5.6  
A
(TJ=150  
)
TA=70  
Pulsed Drain Current  
IDM  
IS  
-50  
A
Continuous Source Current  
(Diode Conduction)  
-2.3  
A
T
A
=25℃  
2. 8  
1.8  
Power Dissipation  
PD  
W
TA=70  
Operation Junction Temperature  
Storgae Temperature Range  
TJ  
-55/150  
-55/150  
70  
TSTG  
θ
R
/W  
Thermal Resistance -Junction to Ambient  
JA  
www.umw-ic.com  
1
UTD Semiconductor Co.,Limited  

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