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STD4NA40-T4 PDF预览

STD4NA40-T4

更新时间: 2024-11-23 23:34:59
品牌 Logo 应用领域
意法半导体 - STMICROELECTRONICS 晶体晶体管
页数 文件大小 规格书
10页 172K
描述
TRANSISTOR | MOSFET | N-CHANNEL | 400V V(BR)DSS | 3.3A I(D) | TO-252

STD4NA40-T4 数据手册

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STD4NA40  
N - CHANNEL ENHANCEMENT MODE  
FAST POWER MOS TRANSISTOR  
TYPE  
VDSS  
RDS(on)  
< 2 Ω  
ID  
STD4NA40  
400 V  
3.3 A  
TYPICAL RDS(on) = 1.7 Ω  
AVALANCHE RUGGED TECHNOLOGY  
100% AVALANCHE TESTED  
REPETITIVE AVALANCHE DATA AT 100oC  
APPLICATION ORIENTED  
3
3
2
CHARACTERIZATION  
1
1
THROUGH-HOLE IPAK (TO-251) POWER  
PACKAGE IN TUBE (SUFFIX ”-1”)  
SURFACE-MOUNTING DPAK (TO-252)  
POWER PACKAGE IN TAPE & REEL  
(SUFFIX ”T4”)  
IPAK  
TO-251  
(Suffix ”-1”)  
DPAK  
TO-252  
(Suffix ”T4”)  
APPLICATIONS  
HIGH SPEED SWITCHING  
UNINTERRUPTIBLE POWER SUPPLY (UPS)  
MOTOR CONTROL, AUDIO AMPLIFIERS  
INDUSTRIAL ACTUATORS  
DC-DC & DC-AC CONVERTERS FOR  
TELECOM, INDUSTRIAL AND CONSUMER  
ENVIRONMENT  
INTERNAL SCHEMATIC DIAGRAM  
PARTICULARLY SUITABLE FOR  
ELECTRONIC FLUORESCENT LAMP  
BALLASTS  
ABSOLUTE MAXIMUM RATINGS  
Symbol  
VDS  
Parameter  
Value  
400  
Unit  
Drain-source Voltage (VGS = 0)  
Drain- gate Voltage (RGS = 20 k)  
Gate-source Voltage  
Drain Current (continuous) at Tc = 25 oC  
Drain Current (continuous) at Tc = 100 oC  
Drain Current (pulsed)  
V
V
VDG R  
VGS  
400  
± 30  
3.3  
V
ID  
A
ID  
2.1  
A
IDM()  
Ptot  
13.2  
50  
A
Total Dissipation at Tc = 25 oC  
W
Derating Factor  
0.4  
W/oC  
oC  
oC  
Tstg  
Tj  
Storage Temperature  
-65 to 150  
150  
Max. Operating Junction Temperature  
() Pulse width limited by safe operating area  
1/10  
November 1996  

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