是否Rohs认证: | 不符合 | 生命周期: | Obsolete |
包装说明: | FBGA, BGA96,6X16,32 | Reach Compliance Code: | not_compliant |
风险等级: | 5.92 | JESD-30 代码: | R-PBGA-B96 |
JESD-609代码: | e0 | 逻辑集成电路类型: | BUS DRIVER |
湿度敏感等级: | 3 | 端子数量: | 96 |
最高工作温度: | 70 °C | 最低工作温度: | |
封装主体材料: | PLASTIC/EPOXY | 封装代码: | FBGA |
封装等效代码: | BGA96,6X16,32 | 封装形状: | RECTANGULAR |
封装形式: | GRID ARRAY, FINE PITCH | 电源: | 1.8 V |
认证状态: | Not Qualified | 子类别: | Other Logic ICs |
标称供电电压 (Vsup): | 1.8 V | 表面贴装: | YES |
技术: | CMOS | 温度等级: | COMMERCIAL |
端子面层: | Tin/Lead (Sn63Pb37) | 端子形式: | BALL |
端子节距: | 0.8 mm | 端子位置: | BOTTOM |
Base Number Matches: | 1 |
型号 | 品牌 | 获取价格 | 描述 | 数据表 |
SSTUG32865 | NXP |
获取价格 |
1.8 V 28-bit 1 : 2 registered buffer with parity for DDR2-1G RDIMM applications | |
SSTUG32865ET/G | NXP |
获取价格 |
IC SSTU SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, TRUE OUTPUT, PBGA160, 9 X 13 MM, 0.70 | |
SSTUG32865ET/G,518 | NXP |
获取价格 |
SSTUG32865 - 1.8 V 28-bit 1 : 2 registered buffer with parity for DDR2-1G RDIMM applicatio | |
SSTUG32865ET/S | NXP |
获取价格 |
IC SSTU SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, TRUE OUTPUT, PBGA160, 9 X 13 MM, 0.70 | |
SSTUG32866 | NXP |
获取价格 |
1.8 V 25-bit 1 : 1 or 14-bit 1 : 2 configurable registered buffer | |
SSTUG32866EC/G | NXP |
获取价格 |
1.8 V 25-bit 1 : 1 or 14-bit 1 : 2 configurable registered buffer | |
SSTUG32866EC/G,518 | NXP |
获取价格 |
SSTUG32866 - 1.8 V 25-bit 1 : 1 or 14-bit 1 : 2 configurable registered buffer with parity | |
SSTUG32866EC/S | NXP |
获取价格 |
1.8 V 25-bit 1 : 1 or 14-bit 1 : 2 configurable registered buffer | |
SSTUG32866EC/S,518 | NXP |
获取价格 |
SSTUG32866 - 1.8 V 25-bit 1 : 1 or 14-bit 1 : 2 configurable registered buffer with parity | |
SSTUG32868 | NXP |
获取价格 |
1.8 V 28-bit 1 : 2 configurable registered buffer with parity for DDR2-1G RDIMM applicatio |