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SSM3582BCPZRL PDF预览

SSM3582BCPZRL

更新时间: 2022-02-26 11:34:49
品牌 Logo 应用领域
亚德诺 - ADI /
页数 文件大小 规格书
59页 751K
描述
2×, 31.76 W, Digital Input, Filterless Stereo Class-D Audio Amplifier

SSM3582BCPZRL 数据手册

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2×, 31.76 W, Digital Input,  
Filterless Stereo Class-D Audio Amplifier  
SSM3582  
Data Sheet  
Supported sample rates from 8 kHz to 192 kHz; 24-bit  
FEATURES  
resolution  
Digital input stereo, high efficiency Class-D amplifier  
Operates from a single 4.5 V to 16 V supply  
State-of-the-art, proprietary, filterless Σ-Δ modulation  
106.5 dB signal-to-noise ratio  
0.004% total harmonic distortion plus noise (THD + N)  
at 5 W into 8 Ω  
Multiple PCM audio serial data formats  
TDM slave with support for up to 16 devices on a single bus  
I2S or left justified slave  
Adjustable full-scale output tailored for many PVDD sources  
2- and 3-cell Li-Ion batteries  
Digital volume control with selectable smooth ramp  
Automatic power-down function  
38.5 μV rms A weighted output noise  
Pop/clickless on/off sequence  
Supply monitoring automatic gain control (AGC) function  
reduces system brownout  
Standalone operational mode without I2C  
Temperature sensor with 1°C step readout via I2C  
Short-circuit, undervoltage, and thermal protection  
Thermal early warning  
2× 14.67 W output at 12 V supply to 4 Ω loads at <1% THD + N  
2× 14.4 W output at 16 V supply to 8 Ω loads at <1% THD + N  
Mono mode for increased maximum output power  
1× 49.69 W output at 16 V supply to 2 Ω loads at <1% THD + N  
Support for low impedance loads  
As low as 3 Ω/5 ꢀH in stereo mode  
As low as 2 Ω/5 ꢀH in mono mode  
High power efficiency  
93.8% efficiency into an 8 Ω load  
Power-on reset  
PVDD sensing ADC  
40-lead, 6 mm × 6 mm LFCSP with thermal pad  
90.6% efficiency into a 4 Ω load  
APPLICATIONS  
12.34 mA quiescent current with single 12 V PVDD supply  
Single supply operation with internal LDOs or option to use  
an external 5 V and 1.8 V supply for lowest power  
consumption  
I2C control and hardware modes with up to 16 pin-selectable  
slots/addresses  
Mobile computing  
All in one computers  
Portable electronics  
Wireless speakers  
Televisions  
FUNCTIONAL BLOCK DIAGRAM  
DVDD  
DVDD_EN  
AVDD AVDD_EN  
PVDD  
SDA  
SCL  
ADDR0  
ADDR1  
DVDD  
1.8V LDO  
AVDD  
2
PVDD  
ADC  
TEMPERATURE  
SENSOR  
I C  
CONTROL  
5V LDO  
OUTL+  
THREE-LEVEL  
BSTL+  
BSTL–  
FULL BRIDGE  
Σ-∆  
DAC  
DAC  
POWER STAGE  
MODULATOR  
OUTL–  
VOLUME  
BLCK  
FSYNC  
SDATA  
2
I S  
TDM  
INTERFACE  
BATTERY  
AGC  
OUTR+  
THREE-LEVEL  
Σ-∆  
MODULATOR  
BSTR+  
BSTR–  
FULL BRIDGE  
POWER STAGE  
OUTR–  
SSM3582  
AGND  
PGND  
Figure 1.  
Rev. 0  
Document Feedback  
Information furnished by Analog Devices is believed to be accurate and reliable. However, no  
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other  
rights of third parties that may result from its use. Specifications subject to change without notice. No  
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.  
Trademarks and registeredtrademarks arethe property of their respective owners.  
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.  
Tel: 781.329.4700  
Technical Support  
©2016 Analog Devices, Inc. All rights reserved.  
www.analog.com  
 
 
 

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