SN74LVC2G125DCU

更新时间： 2024-01-05 00:58:33

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SN74LVC2G125DCU 数据手册

SN74LVC2G125

DUAL BUS BUFFER GATE

WITH 3-STATE OUTPUTS

www.ti.com

SCES204K–APRIL 1999–REVISED JUNE 2005

FEATURES

DCT OR DCU PACKAGE

(TOP VIEW)

•

Available in the Texas Instruments

NanoStar™ and NanoFree™ Packages

1OE

•

Supports 5-V V_CCOperation

2OE

Inputs Accept Voltages to 5.5 V

Max t_pdof 4.3 ns at 3.3 V

GND

Low Power Consumption, 10-µA Max I_CC

±24-mA Output Drive at 3.3 V

YEA, YEP, YZA, OR YZP PACKAGE

(BOTTOM VIEW)

Typical V_OLP(Output Ground Bounce)

<0.8 V at V_CC= 3.3 V, T_A= 25°C

GND

•

Typical V_OHV(Output V_OHUndershoot)

>2 V at V_CC= 3.3 V, T_A= 25°C

1OE

2OE

I_offSupports Partial-Power-Down Mode

Operation

Latch-Up Performance Exceeds 100 mA Per

JESD 78, Class II

ESD Protection Exceeds JESD 22

– 2000-V Human-Body Model (A114-A)

– 200-V Machine Model (A115-A)

– 1000-V Charged-Device Model (C101)

DESCRIPTION/ORDERING INFORMATION

The SN74LVC2G125 is a dual bus buffer gate, designed for 1.65-V to 5.5-V V_CCoperation. This device features

dual line drivers with 3-state outputs. The outputs are disabled when the associated output-enable (OE) input is

high.

NanoStar™ and NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the

die as the package.

ORDERING INFORMATION

T_A

PACKAGE⁽¹⁾

ORDERABLE PART NUMBER TOP-SIDE MARKING⁽²⁾

NanoStar™ – WCSP (DSBGA)

0.17-mm Small Bump – YEA

SN74LVC2G125YEAR

NanoFree™ – WCSP (DSBGA)

0.17-mm Small Bump – YZA (Pb-free)

SN74LVC2G125YZAR

_ _ _CM_

Reel of 3000

NanoStar™ – WCSP (DSBGA)

0.23-mm Large Bump – YEP

SN74LVC2G125YEPR

–40°C to 85°C

NanoFree™ – WCSP (DSBGA)

0.23-mm Large Bump – YZP (Pb-free)

SN74LVC2G125YZPR

SSOP – DCT

Reel of 3000

Reel of 250

SN74LVC2G125DCTR

SN74LVC2G125DCUR

SN74LVC2G125DCUT

C25_ _ _

C25_

VSSOP – DCU

(1) Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at

www.ti.com/sc/package.

(2) DCT: The actual top-side marking has three additional characters that designate the year, month, and assembly/test site.

DCU: The actual top-side marking has one additional character that designates the assembly/test site.

YEA/YZA, YEP/YZP: The actual top-side marking has three preceding characters to denote year, month, and sequence code, and one

following character to designate the assembly/test site. Pin 1 identifier indicates solder-bump composition (1 = SnPb, • = Pb-free).

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas

Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

NanoStar, NanoFree are trademarks of Texas Instruments.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

12 3 4 5 6 7...13

中文翻译

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SN74LVC2G125DCU 替代型号

型号	品牌	替代类型	描述	数据表
74LVC2G125DCUTG4	TI	类似代替	DUAL BUS BUFFER GATE WITH 3-STATE OUTPUTS
CLVC2G125IDCURQ1	TI	类似代替	DUAL BUS BUFFER GATE WITH 3-STATE OUTPUTS
SN74LVC2G125YZPR	TI	类似代替	DUAL BUS BUFFER GATE WITH 3 STATE OUTPUTS

与SN74LVC2G125DCU相关器件

型号	品牌	获取价格	描述	数据表
SN74LVC2G125DCU3	TI	获取价格	具有三态输出的 2 通道、1.65V 至 5.5V 缓冲器 \| DCU \| 8 \| -40
SN74LVC2G125DCUR	TI	获取价格	DUAL BUS BUFFER GATE WITH 3 STATE OUTPUTS
SN74LVC2G125DCURE4	TI	获取价格	IC,BUFFER/DRIVER,SINGLE,2-BIT,LCX/LVC-CMOS,TSSOP,8PIN,PLASTIC
SN74LVC2G125DCUT	TI	获取价格	DUAL BUS BUFFER GATE WITH 3 STATE OUTPUTS
SN74LVC2G125DCUTE4	TI	获取价格	IC,BUFFER/DRIVER,SINGLE,2-BIT,LCX/LVC-CMOS,TSSOP,8PIN,PLASTIC
SN74LVC2G125-Q1	TI	获取价格	DUAL BUS BUFFER GATE WITH 3-STATE OUTPUTS
SN74LVC2G125YEAR	TI	获取价格	DUAL BUS BUFFER GATE WITH 3 STATE OUTPUTS
SN74LVC2G125YEPR	TI	获取价格	DUAL BUS BUFFER GATE WITH 3 STATE OUTPUTS
SN74LVC2G125YZAR	TI	获取价格	DUAL BUS BUFFER GATE WITH 3 STATE OUTPUTS
SN74LVC2G125YZPR	TI	获取价格	DUAL BUS BUFFER GATE WITH 3 STATE OUTPUTS

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