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SCES594A – JULY 2004 − REVISED OCTOBER 2004
D
D
D
Available in the Texas Instruments
NanoStar and NanoFree Packages
Low Static-Power Consumption;
D
Wide Operating V
Range of 0.8 V to 3.6 V
CC
D
Optimized for 3.3-V Operation
D
D
D
D
3.6-V I/O Tolerant to Support Mixed-Mode
Signal Operation
I
= 0.9-µA Max
CC
Low Dynamic-Power Consumption;
= 5 pF Typ at 3.3 V
t
= 7.4 ns Max at 3.3 V
pd
C
pd
Suitable for Point-to-Point Applications
D
Low Input Capacitance; C = 1.5 pF Typ
i
Low Noise − Overshoot and Undershoot
Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II
D
<10% of V
CC
D
ESD Performance Tested Per JESD 22
− 2000-V Human-Body Model
(A114-B, Class II)
− 200-V Machine Model (A115-A)
− 1000-V Charged-Device Model (C101)
D
D
D
Input-Disable Feature Allows Floating Input
Conditions
I
Supports Partial-Power-Down Mode
off
Operation
Includes Schmitt-Trigger Inputs
DCT OR DCU PACKAGE
(TOP VIEW)
YEP OR YZP PACKAGE
(BOTTOM VIEW)
C
D
Y
V
GND
B
A
OE
4
3
2
1
5
6
7
8
V
Y
D
C
1
2
3
4
8
7
6
5
OE
A
B
CC
CC
GND
description/ordering information
The AUP family is TI’s premier solution to the industry’s low-power needs in battery-powered portable
applications. This family ensures a very low static- and dynamic-power consumption across the entire V
CC
range of 0.8 V to 3.6 V, resulting in an increased battery life. This product also maintains excellent signal integrity
(see Figures 1 and 2).
Switching Characteristics
Static-Power Consumption
Dynamic-Power Consumption
(pF)
100%
†
at 25 MHz
(µA)
3.5
3
100%
80%
60%
80%
2.5
2
Input
Output
60%
40%
3.3-V
3.3-V
LVC †
Logic
1.5
1
†
Logic
40%
0.5
0
20%
0%
20%
0%
AUP
AUP
AUP
−0.5
10
15 20
Time − ns
0
5
25
35 40 45
30
†
Single, dual, and triple gates
†
AUP1G08 data at C = 15 pF
L
Figure 1. AUP − The Lowest-Power Family
Figure 2. Excellent Signal Integrity
The SN74AUP1G99 features configurable multiple functions with a 3-state output. This device has the
input-disable feature, which allows floating input signals. The inputs and output are disabled when the
output-enable (OE) input is high. When OE is low, the output state is determined by 16 patterns of 4-bit input.
The user can choose the logic functions, such as MUX, AND, OR, NAND, NOR, XOR, XNOR, inverter, and
buffer. All inputs can be connected to V
or GND.
CC
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
NanoStar and NanoFree are trademarks of Texas Instruments.
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Copyright 2004, Texas Instruments Incorporated
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