Datasheet > 逻辑 > 其他逻辑集成电路> SN74AUP1G99DCTT

SN74AUP1G99DCTT

更新时间： 2024-11-01 05:24:51

品牌	Logo	应用领域
德州仪器 - TI		输出元件
页数	文件大小	规格书
19页	309K
描述
LOW-POWER ULTRA-CONFIGURABLE MULTIPLE-FUNCTION GATE WITH 3-STATE OUTPUTS

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SN74AUP1G99DCTT 技术参数

是否无铅：	不含铅	是否Rohs认证：	符合
生命周期：	Active	零件包装代码：	SOIC
包装说明：	LSSOP, SSOP8,.16	针数：	8
Reach Compliance Code：	compliant	HTS代码：	8542.39.00.01
风险等级：	5.14	系列：	AUP/ULP/V
JESD-30 代码：	R-PDSO-G8	JESD-609代码：	e4
长度：	2.95 mm	负载电容（CL）：	30 pF
逻辑集成电路类型：	LOGIC CIRCUIT	最大I（ol）：	0.004 A
湿度敏感等级：	1	功能数量：	1
端子数量：	8	最高工作温度：	85 °C
最低工作温度：	-40 °C	输出特性：	3-STATE
输出极性：	TRUE	封装主体材料：	PLASTIC/EPOXY
封装代码：	LSSOP	封装等效代码：	SSOP8,.16
封装形状：	RECTANGULAR	封装形式：	SMALL OUTLINE, LOW PROFILE, SHRINK PITCH
包装方法：	TR	峰值回流温度（摄氏度）：	260
电源：	1.2/3.3 V	Prop。Delay @ Nom-Sup：	36.1 ns
认证状态：	Not Qualified	施密特触发器：	YES
座面最大高度：	1.3 mm	子类别：	Gates
最大供电电压 (Vsup)：	3.6 V	最小供电电压 (Vsup)：	0.8 V
标称供电电压 (Vsup)：	1.1 V	表面贴装：	YES
技术：	CMOS	温度等级：	INDUSTRIAL
端子面层：	Nickel/Palladium/Gold (Ni/Pd/Au)	端子形式：	GULL WING
端子节距：	0.65 mm	端子位置：	DUAL
处于峰值回流温度下的最长时间：	NOT SPECIFIED	宽度：	2.8 mm
Base Number Matches：	1

SN74AUP1G99DCTT 数据手册

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SCES594A – JULY 2004 − REVISED OCTOBER 2004

Available in the Texas Instruments

NanoStar and NanoFree Packages

Low Static-Power Consumption;

Wide Operating V

Range of 0.8 V to 3.6 V

Optimized for 3.3-V Operation

3.6-V I/O Tolerant to Support Mixed-Mode

Signal Operation

= 0.9-µA Max

Low Dynamic-Power Consumption;

= 5 pF Typ at 3.3 V

= 7.4 ns Max at 3.3 V

Suitable for Point-to-Point Applications

Low Input Capacitance; C = 1.5 pF Typ

Low Noise − Overshoot and Undershoot

Latch-Up Performance Exceeds 100 mA Per

JESD 78, Class II

<10% of V

ESD Performance Tested Per JESD 22

− 2000-V Human-Body Model

(A114-B, Class II)

− 200-V Machine Model (A115-A)

− 1000-V Charged-Device Model (C101)

Input-Disable Feature Allows Floating Input

Conditions

Supports Partial-Power-Down Mode

off

Operation

Includes Schmitt-Trigger Inputs

DCT OR DCU PACKAGE

(TOP VIEW)

YEP OR YZP PACKAGE

(BOTTOM VIEW)

GND

description/ordering information

The AUP family is TI’s premier solution to the industry’s low-power needs in battery-powered portable

applications. This family ensures a very low static- and dynamic-power consumption across the entire V

range of 0.8 V to 3.6 V, resulting in an increased battery life. This product also maintains excellent signal integrity

(see Figures 1 and 2).

Switching Characteristics

Static-Power Consumption

Dynamic-Power Consumption

(pF)

100%

†

at 25 MHz

(µA)

3.5

100%

80%

60%

80%

2.5

Input

Output

60%

40%

3.3-V

LVC _†

Logic

1.5

†

Logic

40%

0.5

20%

AUP

−0.5

15 20

Time − ns

35 40 45

†

Single, dual, and triple gates

†

AUP1G08 data at C = 15 pF

Figure 1. AUP − The Lowest-Power Family

Figure 2. Excellent Signal Integrity

The SN74AUP1G99 features configurable multiple functions with a 3-state output. This device has the

input-disable feature, which allows floating input signals. The inputs and output are disabled when the

output-enable (OE) input is high. When OE is low, the output state is determined by 16 patterns of 4-bit input.

The user can choose the logic functions, such as MUX, AND, OR, NAND, NOR, XOR, XNOR, inverter, and

buffer. All inputs can be connected to V

or GND.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

NanoStar and NanoFree are trademarks of Texas Instruments.

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POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

12 3 4 5 6 7...19

中文翻译

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SN74AUP1G99DCTT 替代型号

型号	品牌	替代类型	描述	数据表
SN74AUP1G99DCTR	TI	类似代替	LOW-POWER ULTRA-CONFIGURABLE MULTIPLE-FUNCTION GATE WITH 3-STATE OUTPUTS

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