Datasheet > SN74AUP1T02

SN74AUP1T02

更新时间： 2024-11-01 06:12:55

品牌	Logo	应用领域
德州仪器 - TI		输出元件输入元件
页数	文件大小	规格书
11页	164K
描述
LOW POWER, 1.8/2.5/3.3-V INPUT, 3.3-V CMOS OUTPUT,SINGLE 2-INPUT POSITIVE-NOR GATE

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SN74AUP1T02 数据手册

SN74AUP1T02

www.ti.com

SCES799 –APRIL 2010

LOW POWER, 1.8/2.5/3.3-V INPUT, 3.3-V CMOS OUTPUT, SINGLE 2-INPUT

POSITIVE-NOR GATE

Check for Samples: SN74AUP1T02

FEATURES

•

Single-Supply Voltage Translator

•

More Gate Options Available at

www.ti.com/littlelogic

•

Output Level Up to Supply V_CCCMOS Level

ESD Performance Tested Per JESD 22

–

1.8 V to 3.3 V (at V_CC= 3.3 V)

2.5 V to 3.3 V (at V_CC= 3.3 V)

1.8 V to 2.5 V (at V_CC= 2.5 V)

3.3 V to 2.5 V (at V_CC= 2.5 V

–

2000-V Human-Body Model

(A114-B, Class II)

–

1000-V Charged-Device Model (C101)

•

Schmitt-Trigger Inputs Reject Input Noise and

Provide Better Output Signal Integrity

DCK PACKAGE

(TOP VIEW)

•

I_offSupports Partial Power Down (V_CC= 0 V)

V_CC

Very Low Static Power Consumption:

0.1 µA

•

Very Low Dynamic Power Consumption:

0.9 µA

GND

Latch-Up Performance Exceeds 100 mA Per

JESD 78, Class II

Pb-Free Packages Available: SC-70 (DCK)

2 x 2.1 x 0.65 mm (Height 1.1 mm)

DESCRIPTION/ORDERING INFORMATION

The SN74AUP1T02 performs the Boolean function Y = A + B or Y = A ● B with designation for logic-level

translation applications with output referenced to supply V_CC

AUP technology is the industry's lowest-power logic technology designed for use in extending battery-life in

operating. All input levels that accept 1.8-V LVCMOS signals, while operating from either a single 3.3-V or 2.5-V

V_CCsupply. This product also maintains excellent signal integrity (see Figure 1 and Figure 2).

The wide V_CCrange of 2.3 V to 3.6 V allows the possibility of switching output level to connect to external

controllers or processors.

Schmitt-trigger inputs (ΔV_T= 210 mV between positive and negative input transitions) offer improved noise

immunity during switching transitions, which is especially useful on analog mixed-mode designs. Schmitt-trigger

inputs reject input noise, ensure integrity of output signals, and allow for slow input signal transition.

I_offis a feature that allows for powered-down conditions (V_CC= 0 V) and is important in portable and mobile

applications. When V_CC= 0 V, signals in the range from 0 V to 3.6 V can be applied to the inputs and outputs of

the device. No damage occurs to the device under these conditions.

The SN74AUP1T02 is designed with optimized current-drive capability of 4 mA to reduce line reflections,

overshoot, and undershoot caused by high-drive outputs.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas

Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

12 3 4 5 6 7...11

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与SN74AUP1T02相关器件

型号	品牌	获取价格	描述	数据表
SN74AUP1T02DCKR	TI	获取价格	LOW POWER, 1.8/2.5/3.3-V INPUT, 3.3-V CMOS OUTPUT,SINGLE 2-INPUT POSITIVE-NOR GATE
SN74AUP1T02DCKT	TI	获取价格	LOW POWER, 1.8/2.5/3.3-V INPUT, 3.3-V CMOS OUTPUT,SINGLE 2-INPUT POSITIVE-NOR GATE
SN74AUP1T04	TI	获取价格	LOW POWER,1.8/2.5/3.3-V INPUT,3.3-V COMS OUTPUT, SINGLE INVERTER GATE
SN74AUP1T04DCKR	TI	获取价格	LOW POWER,1.8/2.5/3.3-V INPUT,3.3-V COMS OUTPUT, SINGLE INVERTER GATE
SN74AUP1T04DCKT	TI	获取价格	LOW POWER,1.8/2.5/3.3-V INPUT,3.3-V COMS OUTPUT, SINGLE INVERTER GATE
SN74AUP1T08	TI	获取价格	LOW POWER, 1.8/2.5/3.3-V INPUT, 3.3-V CMOS OUTPUT, SINGLE 2-INPUT POSITIVE-AND GATE
SN74AUP1T08DCKR	TI	获取价格	LOW POWER, 1.8/2.5/3.3-V INPUT, 3.3-V CMOS OUTPUT, SINGLE 2-INPUT POSITIVE-AND GATE
SN74AUP1T08DCKT	TI	获取价格	LOW POWER, 1.8/2.5/3.3-V INPUT, 3.3-V CMOS OUTPUT, SINGLE 2-INPUT POSITIVE-AND GATE
SN74AUP1T14	TI	获取价格	LOW POWER, 1.8/2.5/3.3-V INPUT, 3.3-V CMOS OUTPUT, SINGLE SCHMITT-TRIGGER INVERTER GATE
SN74AUP1T14_15	TI	获取价格	LOW POWER, 1.8/2.5/3.3-V INPUT, 3.3-V CMOS OUTPUT, SINGLE SCHMITT-TRIGGER INVERTER GATE

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