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SN74AUP1T04DCKT

更新时间： 2024-09-15 06:12:55

品牌	Logo	应用领域
德州仪器 - TI		输出元件输入元件
页数	文件大小	规格书
11页	163K
描述
LOW POWER,1.8/2.5/3.3-V INPUT,3.3-V COMS OUTPUT, SINGLE INVERTER GATE

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SN74AUP1T04DCKT 技术参数

生命周期：	Obsolete	零件包装代码：	SOIC
包装说明：	TSSOP, TSSOP5/6,.08	针数：	5
Reach Compliance Code：	unknown	HTS代码：	8542.39.00.01
风险等级：	5.76	系列：	AUP/ULP/V
JESD-30 代码：	R-PDSO-G5	长度：	2 mm
逻辑集成电路类型：	INVERTER	功能数量：	1
输入次数：	1	端子数量：	5
最高工作温度：	85 °C	最低工作温度：	-40 °C
封装主体材料：	PLASTIC/EPOXY	封装代码：	TSSOP
封装等效代码：	TSSOP5/6,.08	封装形状：	RECTANGULAR
封装形式：	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH	传播延迟（tpd）：	10.8 ns
认证状态：	Not Qualified	座面最大高度：	1.1 mm
最大供电电压 (Vsup)：	3.6 V	最小供电电压 (Vsup)：	2.3 V
标称供电电压 (Vsup)：	2.5 V	表面贴装：	YES
技术：	CMOS	温度等级：	INDUSTRIAL
端子形式：	GULL WING	端子节距：	0.65 mm
端子位置：	DUAL	宽度：	1.25 mm
Base Number Matches：	1

SN74AUP1T04DCKT 数据手册

SN74AUP1T04

www.ti.com

SCES800 –APRIL 2010

LOW POWER, 1.8/2.5/3.3-V INPUT, 3.3-V CMOS OUTPUT, SINGLE

INVERTER GATE

Check for Samples: SN74AUP1T04

FEATURES

•

Single-Supply Voltage Translator

•

More Gate Options Available at

www.ti.com/littlelogic

•

Output Level Up to Supply V_CCCMOS Level

ESD Performance Tested Per JESD 22

–

1.8 V to 3.3 V (at V_CC= 3.3 V)

2.5 V to 3.3 V (at V_CC= 3.3 V)

1.8 V to 2.5 V (at V_CC= 2.5 V)

3.3 V to 2.5 V (at V_CC= 2.5 V

–

2000-V Human-Body Model

(A114-B, Class II)

–

1000-V Charged-Device Model (C101)

•

Schmitt-Trigger Inputs Reject Input Noise and

Provide Better Output Signal Integrity

DCK PACKAGE

(TOP VIEW)

•

I_offSupports Partial Power Down (V_CC= 0 V)

V_CC

Very Low Static Power Consumption:

0.1 µA

•

Very Low Dynamic Power Consumption:

0.9 µA

GND

Latch-Up Performance Exceeds 100 mA Per

JESD 78, Class II

Pb-Free Packages Available: SC-70 (DCK)

2 x 2.1 x 0.65 mm (Height 1.1 mm)

DESCRIPTION/ORDERING INFORMATION

The SN74AUP1T04 performs the Boolean function Y = A with designation for logic-level translation applications

with output referenced to supply V_CC

AUP technology is the industry's lowest-power logic technology designed for use in extending battery-life in

operating. All input levels that accept 1.8-V LVCMOS signals, while operating from either a single 3.3-V or 2.5-V

V_CCsupply. This product also maintains excellent signal integrity (see Figure 1 and Figure 2).

The wide V_CCrange of 2.3 V to 3.6 V allows the possibility of switching output level to connect to external

controllers or processors.

Schmitt-trigger inputs (ΔV_T= 210 mV between positive and negative input transitions) offer improved noise

immunity during switching transitions, which is especially useful on analog mixed-mode designs. Schmitt-trigger

inputs reject input noise, ensure integrity of output signals, and allow for slow input signal transition.

I_offis a feature that allows for powered-down conditions (V_CC= 0 V) and is important in portable and mobile

applications. When V_CC= 0 V, signals in the range from 0 V to 3.6 V can be applied to the inputs and outputs of

the device. No damage occurs to the device under these conditions.

The SN74AUP1T04 is designed with optimized current-drive capability of 4 mA to reduce line reflections,

overshoot, and undershoot caused by high-drive outputs.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas

Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

12 3 4 5 6 7...11

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与SN74AUP1T04DCKT相关器件

型号	品牌	获取价格	描述	数据表
SN74AUP1T08	TI	获取价格	LOW POWER, 1.8/2.5/3.3-V INPUT, 3.3-V CMOS OUTPUT, SINGLE 2-INPUT POSITIVE-AND GATE
SN74AUP1T08DCKR	TI	获取价格	LOW POWER, 1.8/2.5/3.3-V INPUT, 3.3-V CMOS OUTPUT, SINGLE 2-INPUT POSITIVE-AND GATE
SN74AUP1T08DCKT	TI	获取价格	LOW POWER, 1.8/2.5/3.3-V INPUT, 3.3-V CMOS OUTPUT, SINGLE 2-INPUT POSITIVE-AND GATE
SN74AUP1T14	TI	获取价格	LOW POWER, 1.8/2.5/3.3-V INPUT, 3.3-V CMOS OUTPUT, SINGLE SCHMITT-TRIGGER INVERTER GATE
SN74AUP1T14_15	TI	获取价格	LOW POWER, 1.8/2.5/3.3-V INPUT, 3.3-V CMOS OUTPUT, SINGLE SCHMITT-TRIGGER INVERTER GATE
SN74AUP1T14DCKR	TI	获取价格	LOW POWER, 1.8/2.5/3.3-V INPUT, 3.3-V CMOS OUTPUT, SINGLE SCHMITT-TRIGGER INVERTER GATE
SN74AUP1T14DCKT	TI	获取价格	LOW POWER, 1.8/2.5/3.3-V INPUT, 3.3-V CMOS OUTPUT, SINGLE SCHMITT-TRIGGER INVERTER GATE
SN74AUP1T157	TI	获取价格	LOW POWER, 1.8/2.5/3.3-V INPUT, 3.3-V CMOS OUTPUT, SINGLE 2-INPUT SCHMITT-TRIGGER BUFFER M
SN74AUP1T157DCKR	TI	获取价格	LOW POWER, 1.8/2.5/3.3-V INPUT, 3.3-V CMOS OUTPUT, SINGLE 2-INPUT SCHMITT-TRIGGER BUFFER M
SN74AUP1T157DCKT	TI	获取价格	LOW POWER, 1.8/2.5/3.3-V INPUT, 3.3-V CMOS OUTPUT, SINGLE 2-INPUT SCHMITT-TRIGGER BUFFER M

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